xref: /linux/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml (revision e5a52fd2b8cdb700b3c07b030e050a49ef3156b9) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll1-clk.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 CPU PLL Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13deprecated: true
14
15properties:
16  "#clock-cells":
17    const: 0
18
19  compatible:
20    enum:
21      - allwinner,sun4i-a10-pll1-clk
22      - allwinner,sun6i-a31-pll1-clk
23      - allwinner,sun8i-a23-pll1-clk
24
25  reg:
26    maxItems: 1
27
28  clocks:
29    maxItems: 1
30
31  clock-output-names:
32    maxItems: 1
33
34required:
35  - "#clock-cells"
36  - compatible
37  - reg
38  - clocks
39  - clock-output-names
40
41additionalProperties: false
42
43examples:
44  - |
45    clk@1c20000 {
46        #clock-cells = <0>;
47        compatible = "allwinner,sun4i-a10-pll1";
48        reg = <0x01c20000 0x4>;
49        clocks = <&osc24M>;
50        clock-output-names = "osc24M";
51    };
52
53  - |
54    clk@1c20000 {
55        #clock-cells = <0>;
56        compatible = "allwinner,sun6i-a31-pll1-clk";
57        reg = <0x01c20000 0x4>;
58        clocks = <&osc24M>;
59        clock-output-names = "pll1";
60    };
61
62  - |
63    clk@1c20000 {
64        #clock-cells = <0>;
65        compatible = "allwinner,sun8i-a23-pll1-clk";
66        reg = <0x01c20000 0x4>;
67        clocks = <&osc24M>;
68        clock-output-names = "pll1";
69    };
70
71...
72