1Atmel system registers 2 3Chipid required properties: 4- compatible: Should be "atmel,sama5d2-chipid" 5- reg : Should contain registers location and length 6 7PIT Timer required properties: 8- compatible: Should be "atmel,at91sam9260-pit" 9- reg: Should contain registers location and length 10- interrupts: Should contain interrupt for the PIT which is the IRQ line 11 shared across all System Controller members. 12 13PIT64B Timer required properties: 14- compatible: Should be "microchip,sam9x60-pit64b" 15- reg: Should contain registers location and length 16- interrupts: Should contain interrupt for PIT64B timer 17- clocks: Should contain the available clock sources for PIT64B timer. 18 19System Timer (ST) required properties: 20- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" 21- reg: Should contain registers location and length 22- interrupts: Should contain interrupt for the ST which is the IRQ line 23 shared across all System Controller members. 24- clocks: phandle to input clock. 25Its subnodes can be: 26- watchdog: compatible should be "atmel,at91rm9200-wdt" 27 28RSTC Reset Controller required properties: 29- compatible: Should be "atmel,<chip>-rstc". 30 <chip> can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" 31 it also can be "microchip,sam9x60-rstc" 32- reg: Should contain registers location and length 33- clocks: phandle to input clock. 34 35Example: 36 37 rstc@fffffd00 { 38 compatible = "atmel,at91sam9260-rstc"; 39 reg = <0xfffffd00 0x10>; 40 clocks = <&clk32k>; 41 }; 42 43RAMC SDRAM/DDR Controller required properties: 44- compatible: Should be "atmel,at91rm9200-sdramc", "syscon" 45 "atmel,at91sam9260-sdramc", 46 "atmel,at91sam9g45-ddramc", 47 "atmel,sama5d3-ddramc", 48 "microchip,sam9x60-ddramc" 49- reg: Should contain registers location and length 50 51Examples: 52 53 ramc0: ramc@ffffe800 { 54 compatible = "atmel,at91sam9g45-ddramc"; 55 reg = <0xffffe800 0x200>; 56 }; 57 58SHDWC Shutdown Controller 59 60required properties: 61- compatible: Should be "atmel,<chip>-shdwc". 62 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". 63- reg: Should contain registers location and length 64- clocks: phandle to input clock. 65 66optional properties: 67- atmel,wakeup-mode: String, operation mode of the wakeup mode. 68 Supported values are: "none", "high", "low", "any". 69- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). 70 71optional at91sam9260 properties: 72- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 73 74optional at91sam9rl properties: 75- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. 76- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 77 78optional at91sam9x5 properties: 79- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. 80 81Example: 82 83 shdwc@fffffd10 { 84 compatible = "atmel,at91sam9260-shdwc"; 85 reg = <0xfffffd10 0x10>; 86 clocks = <&clk32k>; 87 }; 88 89SHDWC SAMA5D2-Compatible Shutdown Controller 90 911) shdwc node 92 93required properties: 94- compatible: should be "atmel,sama5d2-shdwc" or "microchip,sam9x60-shdwc". 95- reg: should contain registers location and length 96- clocks: phandle to input clock. 97- #address-cells: should be one. The cell is the wake-up input index. 98- #size-cells: should be zero. 99 100optional properties: 101 102- debounce-delay-us: minimum wake-up inputs debouncer period in 103 microseconds. It's usually a board-related property. 104- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up. 105 106optional microchip,sam9x60-shdwc properties: 107- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 108 109The node contains child nodes for each wake-up input that the platform uses. 110 1112) input nodes 112 113Wake-up input nodes are usually described in the "board" part of the Device 114Tree. Note also that input 0 is linked to the wake-up pin and is frequently 115used. 116 117Required properties: 118- reg: should contain the wake-up input index [0 - 15]. 119 120Optional properties: 121- atmel,wakeup-active-high: boolean, the corresponding wake-up input described 122 by the child, forces the wake-up of the core power supply on a high level. 123 The default is to be active low. 124 125Example: 126 127On the SoC side: 128 shdwc@f8048010 { 129 compatible = "atmel,sama5d2-shdwc"; 130 reg = <0xf8048010 0x10>; 131 clocks = <&clk32k>; 132 #address-cells = <1>; 133 #size-cells = <0>; 134 atmel,wakeup-rtc-timer; 135 }; 136 137On the board side: 138 shdwc@f8048010 { 139 debounce-delay-us = <976>; 140 141 input@0 { 142 reg = <0>; 143 }; 144 145 input@1 { 146 reg = <1>; 147 atmel,wakeup-active-high; 148 }; 149 }; 150 151Special Function Registers (SFR) 152 153Special Function Registers (SFR) manage specific aspects of the integrated 154memory, bridge implementations, processor and other functionality not controlled 155elsewhere. 156 157required properties: 158- compatible: Should be "atmel,<chip>-sfr", "syscon" or 159 "atmel,<chip>-sfrbu", "syscon" 160 <chip> can be "sama5d3", "sama5d4" or "sama5d2". 161 It also can be "microchip,sam9x60-sfr", "syscon". 162- reg: Should contain registers location and length 163 164 sfr@f0038000 { 165 compatible = "atmel,sama5d3-sfr", "syscon"; 166 reg = <0xf0038000 0x60>; 167 }; 168 169Security Module (SECUMOD) 170 171The Security Module macrocell provides all necessary secure functions to avoid 172voltage, temperature, frequency and mechanical attacks on the chip. It also 173embeds secure memories that can be scrambled. 174 175The Security Module also offers the PIOBU pins which can be used as GPIO pins. 176Note that they maintain their voltage during Backup/Self-refresh. 177 178required properties: 179- compatible: Should be "atmel,<chip>-secumod", "syscon". 180 <chip> can be "sama5d2". 181- reg: Should contain registers location and length 182- gpio-controller: Marks the port as GPIO controller. 183- #gpio-cells: There are 2. The pin number is the 184 first, the second represents additional 185 parameters such as GPIO_ACTIVE_HIGH/LOW. 186 187 188 secumod@fc040000 { 189 compatible = "atmel,sama5d2-secumod", "syscon"; 190 reg = <0xfc040000 0x100>; 191 gpio-controller; 192 #gpio-cells = <2>; 193 }; 194