1 /* 2 * Copyright 2001-2003 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 #ifndef _SYS_SGFRUTYPES_H 7 #define _SYS_SGFRUTYPES_H 8 9 #pragma ident "%Z%%M% %I% %E% SMI" 10 11 #ifdef __cplusplus 12 extern "C" { 13 #endif 14 15 /* 16 * sgfrutypes.h - Serengeti/WildCat/Lightweight8 common FRU definitions 17 * 18 * This header file contains the common FRU-ID definitions and macros for the 19 * Serengeti, WildCat and Lightweight8 platforms. 20 * 21 * - definitions of the various FRU types. 22 * - macros to generate FRU names. 23 * 24 * (Not to be confused with the header files for the SGFRU driver) 25 */ 26 27 /* 28 * Known HPU/FRU types 29 * 30 * These FRU definitions are common to both the Serengeti and LightWeight8 31 * platforms. They are used by various macros used by both platforms as well 32 * as the LW8 specific SGENV (environmentals) driver. 33 */ 34 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD (0x101) 35 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_STR \ 36 "System Controller Board" 37 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_ID "SSC" 38 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_SHORTNAME "SSC" 39 40 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800 (0x102) 41 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800_STR \ 42 "System Controller Board (F3800)" 43 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800_ID "SSC" 44 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800_SHORTNAME "SSC" 45 46 47 #define SG_HPU_TYPE_CPU_BOARD (0x201) 48 #define SG_HPU_TYPE_CPU_BOARD_STR "CPU Board" 49 #define SG_HPU_TYPE_CPU_BOARD_ID "SB" 50 #define SG_HPU_TYPE_CPU_BOARD_SHORTNAME "CPU" 51 52 #define SG_HPU_TYPE_WIB_BOARD (0x202) 53 #define SG_HPU_TYPE_WIB_BOARD_STR "WIB Board" 54 #define SG_HPU_TYPE_WIB_BOARD_ID "SB" 55 #define SG_HPU_TYPE_WIB_BOARD_SHORTNAME "WIB" 56 57 #define SG_HPU_TYPE_ZULU_BOARD (0x203) 58 #define SG_HPU_TYPE_ZULU_BOARD_STR "Zulu Board" 59 #define SG_HPU_TYPE_ZULU_BOARD_ID "SB" 60 #define SG_HPU_TYPE_ZULU_BOARD_SHORTNAME "GPX" 61 62 63 #define SG_HPU_TYPE_REPEATER_BOARD (0x301) 64 #define SG_HPU_TYPE_REPEATER_BOARD_STR "Repeater Board" 65 #define SG_HPU_TYPE_REPEATER_BOARD_ID "RP" 66 67 #define SG_HPU_TYPE_LOGIC_ANALYZER_BOARD (0x302) 68 #define SG_HPU_TYPE_LOGIC_ANALYZER_BOARD_STR "Logic Analyzer Board" 69 #define SG_HPU_TYPE_LOGIC_ANALYZER_BOARD_ID "RP" 70 71 #define SG_HPU_TYPE_REPEATER_BOARD_F3800 (0x303) 72 #define SG_HPU_TYPE_REPEATER_BOARD_F3800_STR "Repeater Board (F3800)" 73 #define SG_HPU_TYPE_REPEATER_BOARD_F3800_ID "RP" 74 #define SG_HPU_TYPE_REPEATER_BOARD_F3800_SHORTNAME "RP" 75 76 77 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO (0x401) 78 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO_STR "Fan Tray (F6800, I/O)" 79 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO_ID "FT" 80 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO_SHORTNAME "FAN" 81 82 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU (0x402) 83 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU_STR "Fan Tray (F6800, CPU)" 84 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU_ID "FT" 85 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU_SHORTNAME "FAN" 86 87 #define SG_HPU_TYPE_FAN_TRAY_RACK (0x403) 88 #define SG_HPU_TYPE_FAN_TRAY_RACK_STR "Fan Tray (Rack)" 89 #define SG_HPU_TYPE_FAN_TRAY_RACK_ID "FT" 90 #define SG_HPU_TYPE_FAN_TRAY_RACK_SHORTNAME "RACKFAN" 91 92 #define SG_HPU_TYPE_FAN_TRAY_F4810 (0x404) 93 #define SG_HPU_TYPE_FAN_TRAY_F4810_STR "Fan Tray (F4810)" 94 #define SG_HPU_TYPE_FAN_TRAY_F4810_ID "FT" 95 #define SG_HPU_TYPE_FAN_TRAY_F4810_SHORTNAME "FAN" 96 97 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO (0x405) 98 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO_STR "Fan Tray (F4800, I/O)" 99 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO_ID "FT" 100 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO_SHORTNAME "FAN" 101 102 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU (0x406) 103 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU_STR "Fan Tray (F4800, CPU)" 104 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU_ID "FT" 105 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU_SHORTNAME "FAN" 106 107 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO (0x407) 108 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO_STR \ 109 "Fan Tray (F4800, Top I/O)" 110 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO_ID "FT" 111 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO_SHORTNAME "FAN" 112 113 #define SG_HPU_TYPE_FAN_TRAY_F3800 (0x408) 114 #define SG_HPU_TYPE_FAN_TRAY_F3800_STR "Fan Tray (F3800)" 115 #define SG_HPU_TYPE_FAN_TRAY_F3800_ID "FT" 116 #define SG_HPU_TYPE_FAN_TRAY_F3800_SHORTNAME "FAN" 117 118 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO (0x409) 119 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO_STR \ 120 "Fan Tray (F4800, Bottom I/O)" 121 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO_ID "FT" 122 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO_SHORTNAME "FAN" 123 124 125 #define SG_HPU_TYPE_PCI_IO_BOARD (0x501) 126 #define SG_HPU_TYPE_PCI_IO_BOARD_STR "PCI I/O Board" 127 #define SG_HPU_TYPE_PCI_IO_BOARD_ID "IB" 128 #define SG_HPU_TYPE_PCI_IO_BOARD_SHORTNAME "PCIB" 129 130 #define SG_HPU_TYPE_CPCI_IO_BOARD (0x502) 131 #define SG_HPU_TYPE_CPCI_IO_BOARD_STR "CPCI I/O board" 132 #define SG_HPU_TYPE_CPCI_IO_BOARD_ID "IB" 133 #define SG_HPU_TYPE_CPCI_IO_BOARD_SHORTNAME "CPCB" 134 135 #define SG_HPU_TYPE_CPCI_IO_BOARD_F3800 (0x503) 136 #define SG_HPU_TYPE_CPCI_IO_BOARD_F3800_STR "CPCI I/O board (F3800)" 137 #define SG_HPU_TYPE_CPCI_IO_BOARD_F3800_ID "IB" 138 139 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD (0x504) 140 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_STR "WCI cPCI I/O Board" 141 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_ID "IB" 142 143 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_F3800 (0x505) 144 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_F3800_STR "WCI cPCI I/O Board (F3800)" 145 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_F3800_ID "IB" 146 147 148 #define SG_HPU_TYPE_A123_POWER_SUPPLY (0x601) 149 #define SG_HPU_TYPE_A123_POWER_SUPPLY_STR "A123 Power Supply" 150 #define SG_HPU_TYPE_A123_POWER_SUPPLY_ID "PS" 151 #define SG_HPU_TYPE_A123_POWER_SUPPLY_SHORTNAME "PS" 152 153 #define SG_HPU_TYPE_A138_POWER_SUPPLY (0x602) 154 #define SG_HPU_TYPE_A138_POWER_SUPPLY_STR "A138 Power Supply" 155 #define SG_HPU_TYPE_A138_POWER_SUPPLY_ID "PS" 156 #define SG_HPU_TYPE_A138_POWER_SUPPLY_SHORTNAME "PS" 157 158 #define SG_HPU_TYPE_A145_POWER_SUPPLY (0x603) 159 #define SG_HPU_TYPE_A145_POWER_SUPPLY_STR "A145 Power Supply" 160 #define SG_HPU_TYPE_A145_POWER_SUPPLY_ID "PS" 161 #define SG_HPU_TYPE_A145_POWER_SUPPLY_SHORTNAME "PS" 162 163 #define SG_HPU_TYPE_A152_POWER_SUPPLY (0x604) 164 #define SG_HPU_TYPE_A152_POWER_SUPPLY_STR "A152 Power Supply" 165 #define SG_HPU_TYPE_A152_POWER_SUPPLY_ID "PS" 166 #define SG_HPU_TYPE_A152_POWER_SUPPLY_SHORTNAME "PS" 167 168 #define SG_HPU_TYPE_A153_POWER_SUPPLY (0x605) 169 #define SG_HPU_TYPE_A153_POWER_SUPPLY_STR "A153 Power Supply" 170 #define SG_HPU_TYPE_A153_POWER_SUPPLY_ID "PS" 171 #define SG_HPU_TYPE_A153_POWER_SUPPLY_SHORTNAME "PS" 172 173 174 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE (0x701) /* 0x701 */ 175 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE_STR \ 176 "Sun Fire 3800 Centerplane" 177 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE_ID "ID" 178 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE_SHORTNAME "ID" 179 180 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE (0x702) /* 0x702 */ 181 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE_STR \ 182 "Sun Fire 6800 Centerplane" 183 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE_ID "ID" 184 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE_SHORTNAME "ID" 185 186 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE (0x703) /* 0x703 */ 187 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE_STR \ 188 "Sun Fire 4810 Centerplane" 189 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE_ID "ID" 190 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE_SHORTNAME "ID" 191 192 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE (0x704) /* 0x704 */ 193 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE_STR \ 194 "Sun Fire 4800 Centerplane" 195 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE_ID "ID" 196 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE_SHORTNAME "ID" 197 198 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE (0x705) 199 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE_STR \ 200 "Sun Fire 3800 Replacement Centerplane" 201 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE_ID "ID" 202 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE_SHORTNAME "ID" 203 204 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE (0x706) 205 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE_STR \ 206 "Sun Fire 6800 Replacement Centerplane" 207 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE_ID "ID" 208 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE_SHORTNAME "ID" 209 210 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE (0x707) 211 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE_STR \ 212 "Sun Fire 4810 Replacement Centerplane" 213 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE_ID "ID" 214 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE_SHORTNAME "ID" 215 216 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE (0x708) 217 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE_STR \ 218 "Sun Fire 4800 Replacement Centerplane" 219 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE_ID "ID" 220 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE_SHORTNAME "ID" 221 222 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD (0x709) /* 0x709 */ 223 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD_STR \ 224 "Sun Fire Replacement ID Board" 225 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD_ID "ID" 226 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD_SHORTNAME "ID" 227 228 229 #define SG_HPU_TYPE_AC_SEQUENCER (0x900) 230 #define SG_HPU_TYPE_AC_SEQUENCER_STR "AC Sequencer" 231 #define SG_HPU_TYPE_AC_SEQUENCER_ID "AC" 232 #define SG_HPU_TYPE_AC_SEQUENCER_SHORTNAME "AC" 233 234 235 #define SG_HPU_TYPE_2MB_ECACHE_MODULE ((10<<8)|1) /* 0xA01 */ 236 #define SG_HPU_TYPE_2MB_ECACHE_MODULE_STR \ 237 "2MB Ecache module" 238 239 #define SG_HPU_TYPE_2MB_ECACHE_MODULE_SHORTNAME "ECACHE" 240 241 #define SG_HPU_TYPE_4MB_ECACHE_MODULE ((10<<8)|2) /* 0xA02 */ 242 #define SG_HPU_TYPE_4MB_ECACHE_MODULE_STR \ 243 "4MB Ecache module" 244 245 #define SG_HPU_TYPE_4MB_ECACHE_MODULE_SHORTNAME "ECACHE" 246 247 #define SG_HPU_TYPE_DRAM_SLOT ((11<<8)|0) /* 0xB00 */ 248 #define SG_HPU_TYPE_DRAM_SLOT_STR \ 249 "DRAM slot" 250 251 #define SG_HPU_TYPE_DRAM_SLOT_SHORTNAME "DIMM" 252 253 #define SG_HPU_TYPE_128MB_DRAM_MODULE ((11<<8)|1) /* 0xB01 */ 254 #define SG_HPU_TYPE_128MB_DRAM_MODULE_STR \ 255 "128MB DRAM module" 256 257 #define SG_HPU_TYPE_128MB_DRAM_MODULE_SHORTNAME "DIMM" 258 259 #define SG_HPU_TYPE_256MB_DRAM_MODULE ((11<<8)|2) /* 0xB02 */ 260 #define SG_HPU_TYPE_256MB_DRAM_MODULE_STR \ 261 "256MB DRAM module" 262 263 #define SG_HPU_TYPE_256MB_DRAM_MODULE_SHORTNAME "DIMM" 264 265 #define SG_HPU_TYPE_512MB_DRAM_MODULE ((11<<8)|3) /* 0xB03 */ 266 #define SG_HPU_TYPE_512MB_DRAM_MODULE_STR \ 267 "512MB DRAM module" 268 269 #define SG_HPU_TYPE_512MB_DRAM_MODULE_SHORTNAME "DIMM" 270 271 #define SG_HPU_TYPE_1GB_DRAM_MODULE ((11<<8)|4) /* 0xB04 */ 272 #define SG_HPU_TYPE_1GB_DRAM_MODULE_STR \ 273 "1GB DRAM module" 274 275 #define SG_HPU_TYPE_1GB_DRAM_MODULE_SHORTNAME "DIMM" 276 277 /* 278 * These macros are used to generate the FRU Names of the various boards etc. 279 * A string is passed in to each macro and by calling a number of the 280 * macros a FRU name in the HLLN format can be built up. 281 * 282 * Note: The string needs to be initialized to an empty string before the 283 * first of these macros is called to generate a FRU Name. 284 */ 285 #define MAX_FRU_NAME_LEN 20 286 287 #define SG_SET_FRU_NAME_NODE(str, num) \ 288 { \ 289 char tmp_str[MAX_FRU_NAME_LEN]; \ 290 sprintf(tmp_str, "/N%d", num); \ 291 strcat(str, tmp_str); \ 292 } 293 294 #define SG_SET_FRU_NAME_CPU_BOARD(str, num) \ 295 { \ 296 char tmp_str[MAX_FRU_NAME_LEN]; \ 297 sprintf(tmp_str, "/%s%d", SG_HPU_TYPE_CPU_BOARD_ID, num); \ 298 strcat(str, tmp_str); \ 299 } 300 301 #define SG_SET_FRU_NAME_IO_BOARD(str, num) \ 302 { \ 303 char tmp_str[MAX_FRU_NAME_LEN]; \ 304 sprintf(tmp_str, "/%s%d", SG_HPU_TYPE_PCI_IO_BOARD_ID, num); \ 305 strcat(str, tmp_str); \ 306 } 307 308 #define SG_SET_FRU_NAME_MODULE(str, num) \ 309 { \ 310 char tmp_str[MAX_FRU_NAME_LEN]; \ 311 sprintf(tmp_str, "/P%d", num); \ 312 strcat(str, tmp_str); \ 313 } 314 315 #define SG_SET_FRU_NAME_CORE(str, num) \ 316 { \ 317 char tmp_str[MAX_FRU_NAME_LEN]; \ 318 sprintf(tmp_str, "/C%d", num); \ 319 strcat(str, tmp_str); \ 320 } 321 322 #define SG_SET_FRU_NAME_BANK(str, num) \ 323 { \ 324 char tmp_str[MAX_FRU_NAME_LEN]; \ 325 sprintf(tmp_str, "/B%d", num); \ 326 strcat(str, tmp_str); \ 327 } 328 329 #define SG_SET_FRU_NAME_DIMM(str, num) \ 330 { \ 331 char tmp_str[MAX_FRU_NAME_LEN]; \ 332 sprintf(tmp_str, "/D%d", num); \ 333 strcat(str, tmp_str); \ 334 } 335 336 337 #ifdef __cplusplus 338 } 339 #endif 340 341 #endif /* _SYS_SGFRUTYPES_H */ 342