xref: /illumos-gate/usr/src/uts/sun4/vm/vm_dep.h (revision d67944fbe3fa0b31893a7116a09b0718eecf6078)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 /*
27  * UNIX machine dependent virtual memory support.
28  */
29 
30 #ifndef	_VM_DEP_H
31 #define	_VM_DEP_H
32 
33 #ifdef	__cplusplus
34 extern "C" {
35 #endif
36 
37 #include <vm/hat_sfmmu.h>
38 #include <sys/archsystm.h>
39 #include <sys/memnode.h>
40 
41 #define	GETTICK()	gettick()
42 
43 /* #define for keeping code architecturally neutral */
44 #define	randtick()	gettick()
45 
46 /*
47  * Per page size free lists. Allocated dynamically.
48  */
49 #define	MAX_MEM_TYPES	2	/* 0 = reloc, 1 = noreloc */
50 #define	MTYPE_RELOC	0
51 #define	MTYPE_NORELOC	1
52 
53 #define	PP_2_MTYPE(pp)	(PP_ISNORELOC(pp) ? MTYPE_NORELOC : MTYPE_RELOC)
54 
55 #define	MTYPE_INIT(mtype, vp, vaddr, flags, pgsz)			\
56 	mtype = (flags & PG_NORELOC) ? MTYPE_NORELOC : MTYPE_RELOC;
57 
58 /* mtype init for page_get_replacement_page */
59 #define	MTYPE_PGR_INIT(mtype, flags, pp, mnode, pgcnt)			\
60 	mtype = (flags & PG_NORELOC) ? MTYPE_NORELOC : MTYPE_RELOC;
61 
62 #define	MNODETYPE_2_PFN(mnode, mtype, pfnlo, pfnhi)			\
63 	ASSERT(mtype != MTYPE_NORELOC);					\
64 	pfnlo = mem_node_config[mnode].physbase;			\
65 	pfnhi = mem_node_config[mnode].physmax;
66 
67 /*
68  * candidate counters in vm_pagelist.c are indexed by color and range
69  */
70 #define	MAX_MNODE_MRANGES		MAX_MEM_TYPES
71 #define	MNODE_RANGE_CNT(mnode)		MAX_MNODE_MRANGES
72 #define	MNODE_MAX_MRANGE(mnode)		(MAX_MEM_TYPES - 1)
73 #define	MTYPE_2_MRANGE(mnode, mtype)	(mtype)
74 
75 /*
76  * Internal PG_ flags.
77  */
78 #define	PGI_RELOCONLY	0x10000	/* acts in the opposite sense to PG_NORELOC */
79 #define	PGI_NOCAGE	0x20000	/* indicates Cage is disabled */
80 #define	PGI_PGCPHIPRI	0x40000	/* page_get_contig_page priority allocation */
81 #define	PGI_PGCPSZC0	0x80000	/* relocate base pagesize page */
82 
83 /*
84  * PGI mtype flags - should not overlap PGI flags
85  */
86 #define	PGI_MT_RANGE	0x1000000	/* mtype range */
87 #define	PGI_MT_NEXT	0x2000000	/* get next mtype */
88 
89 extern page_t ***page_freelists[MMU_PAGE_SIZES][MAX_MEM_TYPES];
90 extern page_t ***page_cachelists[MAX_MEM_TYPES];
91 
92 #define	PAGE_FREELISTS(mnode, szc, color, mtype) \
93 	(*(page_freelists[szc][mtype][mnode] + (color)))
94 
95 #define	PAGE_CACHELISTS(mnode, color, mtype) \
96 	(*(page_cachelists[mtype][mnode] + (color)))
97 
98 /*
99  * There are 'page_colors' colors/bins.  Spread them out under a
100  * couple of locks.  There are mutexes for both the page freelist
101  * and the page cachelist.  We want enough locks to make contention
102  * reasonable, but not too many -- otherwise page_freelist_lock() gets
103  * so expensive that it becomes the bottleneck!
104  */
105 #define	NPC_MUTEX	16
106 
107 extern kmutex_t	*fpc_mutex[NPC_MUTEX];
108 extern kmutex_t	*cpc_mutex[NPC_MUTEX];
109 
110 /*
111  * Iterator provides the info needed to convert RA to PA.
112  * MEM_NODE_ITERATOR_INIT() should be called before
113  * PAGE_NEXT_PFN_FOR_COLOR() if pfn was not obtained via a previous
114  * PAGE_NEXT_PFN_FOR_COLOR() call. Iterator caches color 2 hash
115  * translations requiring initializer call if color or ceq_mask changes,
116  * even if pfn doesn't. MEM_NODE_ITERATOR_INIT() must also be called before
117  * PFN_2_COLOR() that uses a valid iterator argument.
118  */
119 #ifdef	sun4v
120 
121 typedef struct mem_node_iterator {
122 	uint_t mi_mnode;		/* mnode in which to iterate */
123 	int mi_init;			/* set to 1 when first init */
124 	int mi_last_mblock;		/* last mblock visited */
125 	uint_t mi_hash_ceq_mask;	/* cached copy of ceq_mask */
126 	uint_t mi_hash_color;		/* cached copy of color */
127 	uint_t mi_mnode_mask;		/* number of mask bits */
128 	uint_t mi_mnode_pfn_shift;	/* mnode position in pfn */
129 	pfn_t mi_mblock_base;		/* first valid pfn in current mblock */
130 	pfn_t mi_mblock_end;		/* last valid pfn in current mblock */
131 	pfn_t mi_ra_to_pa;		/* ra adjustment for current mblock */
132 	pfn_t mi_mnode_pfn_mask;	/* mask to obtain mnode id bits */
133 } mem_node_iterator_t;
134 
135 #define	MEM_NODE_ITERATOR_DECL(it) \
136 	mem_node_iterator_t it
137 #define	MEM_NODE_ITERATOR_INIT(pfn, mnode, szc, it) \
138 	(pfn) = plat_mem_node_iterator_init((pfn), (mnode), (szc), (it), 1)
139 
140 extern pfn_t plat_mem_node_iterator_init(pfn_t, int, uchar_t,
141     mem_node_iterator_t *, int);
142 extern pfn_t plat_rapfn_to_papfn(pfn_t);
143 extern int interleaved_mnodes;
144 
145 #else	/* sun4v */
146 
147 #define	MEM_NODE_ITERATOR_DECL(it) \
148 	void *it = NULL
149 #define	MEM_NODE_ITERATOR_INIT(pfn, mnode, szc, it)
150 
151 #endif	/* sun4v */
152 
153 /*
154  * Return the mnode limits so that hpc_counters length and base
155  * index can be determined. When interleaved_mnodes is set, we
156  * create an array only for the first mnode that exists. All other
157  * mnodes will share the array in this case.
158  * If interleaved_mnodes is not set, simply return the limits for
159  * the given mnode.
160  */
161 #define	HPM_COUNTERS_LIMITS(mnode, physbase, physmax, first)		\
162 	if (!interleaved_mnodes) {					\
163 		(physbase) = mem_node_config[(mnode)].physbase;		\
164 		(physmax) = mem_node_config[(mnode)].physmax;		\
165 		(first) = (mnode);					\
166 	} else if ((first) < 0) {					\
167 		mem_node_max_range(&(physbase), &(physmax));		\
168 		(first) = (mnode);					\
169 	}
170 
171 #define	PAGE_CTRS_WRITE_LOCK(mnode)					\
172 	if (!interleaved_mnodes) {					\
173 		rw_enter(&page_ctrs_rwlock[(mnode)], RW_WRITER);	\
174 		page_freelist_lock(mnode);				\
175 	} else {							\
176 		/* changing shared hpm_counters */			\
177 		int _i;							\
178 		for (_i = 0; _i < max_mem_nodes; _i++) {		\
179 			rw_enter(&page_ctrs_rwlock[_i], RW_WRITER);	\
180 			page_freelist_lock(_i);				\
181 		}							\
182 	}
183 
184 #define	PAGE_CTRS_WRITE_UNLOCK(mnode)					\
185 	if (!interleaved_mnodes) {					\
186 		page_freelist_unlock(mnode);				\
187 		rw_exit(&page_ctrs_rwlock[(mnode)]);			\
188 	} else {							\
189 		int _i;							\
190 		for (_i = 0; _i < max_mem_nodes; _i++) {		\
191 			page_freelist_unlock(_i);			\
192 			rw_exit(&page_ctrs_rwlock[_i]);			\
193 		}							\
194 	}
195 
196 /*
197  * cpu specific color conversion functions
198  */
199 extern uint_t page_get_nsz_color_mask_cpu(uchar_t, uint_t);
200 #pragma weak page_get_nsz_color_mask_cpu
201 
202 extern uint_t page_get_nsz_color_cpu(uchar_t, uint_t);
203 #pragma weak page_get_nsz_color_cpu
204 
205 extern uint_t page_get_color_shift_cpu(uchar_t, uchar_t);
206 #pragma weak page_get_color_shift_cpu
207 
208 extern uint_t page_convert_color_cpu(uint_t, uchar_t, uchar_t);
209 #pragma weak page_convert_color_cpu
210 
211 extern pfn_t page_next_pfn_for_color_cpu(pfn_t,
212     uchar_t, uint_t, uint_t, uint_t, void *);
213 #pragma weak page_next_pfn_for_color_cpu
214 
215 extern uint_t  page_pfn_2_color_cpu(pfn_t, uchar_t, void *);
216 #pragma weak page_pfn_2_color_cpu
217 
218 #define	PAGE_GET_COLOR_SHIFT(szc, nszc)				\
219 	((&page_get_color_shift_cpu != NULL) ?			\
220 	    page_get_color_shift_cpu(szc, nszc) :		\
221 	    (hw_page_array[(nszc)].hp_shift -			\
222 		hw_page_array[(szc)].hp_shift))
223 
224 #define	PAGE_CONVERT_COLOR(ncolor, szc, nszc)			\
225 	((&page_convert_color_cpu != NULL) ?			\
226 	    page_convert_color_cpu(ncolor, szc, nszc) :		\
227 	    ((ncolor) << PAGE_GET_COLOR_SHIFT((szc), (nszc))))
228 
229 #define	PFN_2_COLOR(pfn, szc, it)				\
230 	((&page_pfn_2_color_cpu != NULL) ?			\
231 	    page_pfn_2_color_cpu(pfn, szc, it) :		\
232 	    ((pfn & (hw_page_array[0].hp_colors - 1)) >>	\
233 		(hw_page_array[szc].hp_shift -			\
234 		    hw_page_array[0].hp_shift)))
235 
236 #define	PNUM_SIZE(szc)							\
237 	(hw_page_array[(szc)].hp_pgcnt)
238 #define	PNUM_SHIFT(szc)							\
239 	(hw_page_array[(szc)].hp_shift - hw_page_array[0].hp_shift)
240 #define	PAGE_GET_SHIFT(szc)						\
241 	(hw_page_array[(szc)].hp_shift)
242 #define	PAGE_GET_PAGECOLORS(szc)					\
243 	(hw_page_array[(szc)].hp_colors)
244 
245 /*
246  * This macro calculates the next sequential pfn with the specified
247  * color using color equivalency mask
248  */
249 #define	PAGE_NEXT_PFN_FOR_COLOR(pfn, szc, color, ceq_mask, color_mask, it)   \
250 	{                                                                    \
251 		ASSERT(((color) & ~(ceq_mask)) == 0);                        \
252 		if (&page_next_pfn_for_color_cpu == NULL) {                  \
253 			uint_t	pfn_shift = PAGE_BSZS_SHIFT(szc);            \
254 			pfn_t	spfn = pfn >> pfn_shift;                     \
255 			pfn_t	stride = (ceq_mask) + 1;                     \
256 			ASSERT((((ceq_mask) + 1) & (ceq_mask)) == 0);        \
257 			if (((spfn ^ (color)) & (ceq_mask)) == 0) {          \
258 				pfn += stride << pfn_shift;                  \
259 			} else {                                             \
260 				pfn = (spfn & ~(pfn_t)(ceq_mask)) | (color); \
261 				pfn = (pfn > spfn ? pfn : pfn + stride) <<   \
262 				    pfn_shift;                               \
263 			}                                                    \
264 		} else {                                                     \
265 		    pfn = page_next_pfn_for_color_cpu(pfn, szc, color,	     \
266 			ceq_mask, color_mask, it);			     \
267 		}                                                            \
268 	}
269 
270 /* get the color equivalency mask for the next szc */
271 #define	PAGE_GET_NSZ_MASK(szc, mask)                                         \
272 	((&page_get_nsz_color_mask_cpu == NULL) ?                            \
273 	    ((mask) >> (PAGE_GET_SHIFT((szc) + 1) - PAGE_GET_SHIFT(szc))) :  \
274 	    page_get_nsz_color_mask_cpu(szc, mask))
275 
276 /* get the color of the next szc */
277 #define	PAGE_GET_NSZ_COLOR(szc, color)                                       \
278 	((&page_get_nsz_color_cpu == NULL) ?                                 \
279 	    ((color) >> (PAGE_GET_SHIFT((szc) + 1) - PAGE_GET_SHIFT(szc))) : \
280 	    page_get_nsz_color_cpu(szc, color))
281 
282 /* Find the bin for the given page if it was of size szc */
283 #define	PP_2_BIN_SZC(pp, szc)	(PFN_2_COLOR(pp->p_pagenum, szc, (void *)(-1)))
284 
285 #define	PP_2_BIN(pp)		(PP_2_BIN_SZC(pp, pp->p_szc))
286 
287 #define	PP_2_MEM_NODE(pp)	(PFN_2_MEM_NODE(pp->p_pagenum))
288 
289 #define	PC_BIN_MUTEX(mnode, bin, flags) ((flags & PG_FREE_LIST) ?	\
290 	&fpc_mutex[(bin) & (NPC_MUTEX - 1)][mnode] :			\
291 	&cpc_mutex[(bin) & (NPC_MUTEX - 1)][mnode])
292 
293 #define	FPC_MUTEX(mnode, i)	(&fpc_mutex[i][mnode])
294 #define	CPC_MUTEX(mnode, i)	(&cpc_mutex[i][mnode])
295 
296 #define	PFN_BASE(pfnum, szc)	(pfnum & ~((1 << PAGE_BSZS_SHIFT(szc)) - 1))
297 
298 /*
299  * this structure is used for walking free page lists
300  * controls when to split large pages into smaller pages,
301  * and when to coalesce smaller pages into larger pages
302  */
303 typedef struct page_list_walker {
304 	uint_t	plw_colors;		/* num of colors for szc */
305 	uint_t  plw_color_mask;		/* colors-1 */
306 	uint_t	plw_bin_step;		/* next bin: 1 or 2 */
307 	uint_t  plw_count;		/* loop count */
308 	uint_t	plw_bin0;		/* starting bin */
309 	uint_t  plw_bin_marker;		/* bin after initial jump */
310 	uint_t  plw_bin_split_prev;	/* last bin we tried to split */
311 	uint_t  plw_do_split;		/* set if OK to split */
312 	uint_t  plw_split_next;		/* next bin to split */
313 	uint_t	plw_ceq_dif;		/* number of different color groups */
314 					/* to check */
315 	uint_t	plw_ceq_mask[MMU_PAGE_SIZES + 1]; /* color equiv mask */
316 	uint_t	plw_bins[MMU_PAGE_SIZES + 1];	/* num of bins */
317 } page_list_walker_t;
318 
319 void	page_list_walk_init(uchar_t szc, uint_t flags, uint_t bin,
320     int can_split, int use_ceq, page_list_walker_t *plw);
321 
322 typedef	char	hpmctr_t;
323 
324 #ifdef DEBUG
325 #define	CHK_LPG(pp, szc)	chk_lpg(pp, szc)
326 extern void	chk_lpg(page_t *, uchar_t);
327 #else
328 #define	CHK_LPG(pp, szc)
329 #endif
330 
331 /*
332  * page list count per mnode and type.
333  */
334 typedef	struct {
335 	pgcnt_t	plc_mt_pgmax;		/* max page cnt */
336 	pgcnt_t plc_mt_clpgcnt;		/* cache list cnt */
337 	pgcnt_t plc_mt_flpgcnt;		/* free list cnt - small pages */
338 	pgcnt_t plc_mt_lgpgcnt;		/* free list cnt - large pages */
339 #ifdef DEBUG
340 	struct {
341 		pgcnt_t plc_mts_pgcnt;	/* per page size count */
342 		int	plc_mts_colors;
343 		pgcnt_t	*plc_mtsc_pgcnt; /* per color bin count */
344 	} plc_mts[MMU_PAGE_SIZES];
345 #endif
346 } plcnt_t[MAX_MEM_NODES][MAX_MEM_TYPES];
347 
348 #ifdef DEBUG
349 
350 #define	PLCNT_SZ(ctrs_sz) {						\
351 	int	szc;							\
352 	for (szc = 0; szc < mmu_page_sizes; szc++) {			\
353 		int	colors = page_get_pagecolors(szc);		\
354 		ctrs_sz += (max_mem_nodes * MAX_MEM_TYPES *		\
355 		    colors * sizeof (pgcnt_t));				\
356 	}								\
357 }
358 
359 #define	PLCNT_INIT(base) {						\
360 	int	mn, mt, szc, colors;					\
361 	for (szc = 0; szc < mmu_page_sizes; szc++) {			\
362 		colors = page_get_pagecolors(szc);			\
363 		for (mn = 0; mn < max_mem_nodes; mn++) {		\
364 			for (mt = 0; mt < MAX_MEM_TYPES; mt++) {	\
365 				plcnt[mn][mt].plc_mts[szc].		\
366 				    plc_mts_colors = colors;		\
367 				plcnt[mn][mt].plc_mts[szc].		\
368 				    plc_mtsc_pgcnt = (pgcnt_t *)base;	\
369 				base += (colors * sizeof (pgcnt_t));	\
370 			}						\
371 		}							\
372 	}								\
373 }
374 
375 #define	PLCNT_DO(pp, mn, mtype, szc, cnt, flags) {			\
376 	int	bin = PP_2_BIN(pp);					\
377 	if (flags & PG_CACHE_LIST)					\
378 		atomic_add_long(&plcnt[mn][mtype].plc_mt_clpgcnt, cnt);	\
379 	else if (szc)							\
380 		atomic_add_long(&plcnt[mn][mtype].plc_mt_lgpgcnt, cnt);	\
381 	else								\
382 		atomic_add_long(&plcnt[mn][mtype].plc_mt_flpgcnt, cnt);	\
383 	atomic_add_long(&plcnt[mn][mtype].plc_mts[szc].plc_mts_pgcnt,	\
384 	    cnt);							\
385 	atomic_add_long(&plcnt[mn][mtype].plc_mts[szc].			\
386 	    plc_mtsc_pgcnt[bin], cnt);					\
387 }
388 
389 #else
390 
391 #define	PLCNT_SZ(ctrs_sz)
392 
393 #define	PLCNT_INIT(base)
394 
395 /* PG_FREE_LIST may not be explicitly set in flags for large pages */
396 
397 #define	PLCNT_DO(pp, mn, mtype, szc, cnt, flags) {			\
398 	if (flags & PG_CACHE_LIST)					\
399 		atomic_add_long(&plcnt[mn][mtype].plc_mt_clpgcnt, cnt);	\
400 	else if (szc)							\
401 		atomic_add_long(&plcnt[mn][mtype].plc_mt_lgpgcnt, cnt);	\
402 	else								\
403 		atomic_add_long(&plcnt[mn][mtype].plc_mt_flpgcnt, cnt);	\
404 }
405 
406 #endif
407 
408 #define	PLCNT_INCR(pp, mn, mtype, szc, flags) {				\
409 	long	cnt = (1 << PAGE_BSZS_SHIFT(szc));			\
410 	PLCNT_DO(pp, mn, mtype, szc, cnt, flags);			\
411 }
412 
413 #define	PLCNT_DECR(pp, mn, mtype, szc, flags) {				\
414 	long	cnt = ((-1) << PAGE_BSZS_SHIFT(szc));			\
415 	PLCNT_DO(pp, mn, mtype, szc, cnt, flags);			\
416 }
417 
418 /*
419  * macros to update page list max counts - done when pages transferred
420  * from RELOC to NORELOC mtype (kcage_init or kcage_assimilate_page).
421  */
422 
423 #define	PLCNT_XFER_NORELOC(pp) {					\
424 	long	cnt = (1 << PAGE_BSZS_SHIFT((pp)->p_szc));		\
425 	int	mn = PP_2_MEM_NODE(pp);					\
426 	atomic_add_long(&plcnt[mn][MTYPE_NORELOC].plc_mt_pgmax, cnt);	\
427 	atomic_add_long(&plcnt[mn][MTYPE_RELOC].plc_mt_pgmax, -cnt);	\
428 }
429 
430 /*
431  * macro to modify the page list max counts when memory is added to
432  * the page lists during startup (add_physmem) or during a DR operation
433  * when memory is added (kphysm_add_memory_dynamic) or deleted
434  * (kphysm_del_cleanup).
435  */
436 #define	PLCNT_MODIFY_MAX(pfn, cnt) {					       \
437 	spgcnt_t _cnt = (spgcnt_t)(cnt);				       \
438 	pgcnt_t _acnt = ABS(_cnt);					       \
439 	int _mn;							       \
440 	pgcnt_t _np;							       \
441 	if (&plat_mem_node_intersect_range != NULL) {			       \
442 		for (_mn = 0; _mn < max_mem_nodes; _mn++) {		       \
443 			plat_mem_node_intersect_range((pfn), _acnt, _mn, &_np);\
444 			if (_np == 0)					       \
445 				continue;				       \
446 			atomic_add_long(&plcnt[_mn][MTYPE_RELOC].plc_mt_pgmax, \
447 			    (_cnt < 0) ? -_np : _np);			       \
448 		}							       \
449 	} else {							       \
450 		pfn_t _pfn = (pfn);					       \
451 		pfn_t _endpfn = _pfn + _acnt;				       \
452 		while (_pfn < _endpfn) {				       \
453 			_mn = PFN_2_MEM_NODE(_pfn);			       \
454 			_np = MIN(_endpfn, mem_node_config[_mn].physmax + 1) - \
455 			    _pfn;					       \
456 			_pfn += _np;					       \
457 			atomic_add_long(&plcnt[_mn][MTYPE_RELOC].plc_mt_pgmax, \
458 			    (_cnt < 0) ? -_np : _np);			       \
459 		}							       \
460 	}								       \
461 }
462 
463 extern plcnt_t	plcnt;
464 
465 #define	MNODE_PGCNT(mn)							\
466 	(plcnt[mn][MTYPE_RELOC].plc_mt_clpgcnt +			\
467 	    plcnt[mn][MTYPE_NORELOC].plc_mt_clpgcnt +			\
468 	    plcnt[mn][MTYPE_RELOC].plc_mt_flpgcnt +			\
469 	    plcnt[mn][MTYPE_NORELOC].plc_mt_flpgcnt +			\
470 	    plcnt[mn][MTYPE_RELOC].plc_mt_lgpgcnt +			\
471 	    plcnt[mn][MTYPE_NORELOC].plc_mt_lgpgcnt)
472 
473 #define	MNODETYPE_PGCNT(mn, mtype)					\
474 	(plcnt[mn][mtype].plc_mt_clpgcnt +				\
475 	    plcnt[mn][mtype].plc_mt_flpgcnt +				\
476 	    plcnt[mn][mtype].plc_mt_lgpgcnt)
477 
478 /*
479  * macros to loop through the mtype range - MTYPE_START returns -1 in
480  * mtype if no pages in mnode/mtype and possibly NEXT mtype.
481  */
482 #define	MTYPE_START(mnode, mtype, flags) {				\
483 	if (plcnt[mnode][mtype].plc_mt_pgmax == 0) {			\
484 		ASSERT(mtype == MTYPE_RELOC ||				\
485 		    MNODETYPE_PGCNT(mnode, mtype) == 0 ||		\
486 		    plcnt[mnode][mtype].plc_mt_pgmax != 0);		\
487 		MTYPE_NEXT(mnode, mtype, flags);			\
488 	}								\
489 }
490 
491 /*
492  * if allocation from the RELOC pool failed and there is sufficient cage
493  * memory, attempt to allocate from the NORELOC pool.
494  */
495 #define	MTYPE_NEXT(mnode, mtype, flags) { 				\
496 	if (!(flags & (PG_NORELOC | PGI_NOCAGE | PGI_RELOCONLY)) &&	\
497 	    (kcage_freemem >= kcage_lotsfree)) {			\
498 		if (plcnt[mnode][MTYPE_NORELOC].plc_mt_pgmax == 0) {	\
499 			ASSERT(MNODETYPE_PGCNT(mnode, MTYPE_NORELOC) == 0 || \
500 			    plcnt[mnode][MTYPE_NORELOC].plc_mt_pgmax != 0);  \
501 			mtype = -1;					\
502 		} else {						\
503 			mtype = MTYPE_NORELOC;				\
504 			flags |= PG_NORELOC;				\
505 		}							\
506 	} else {							\
507 		mtype = -1;						\
508 	}								\
509 }
510 
511 /*
512  * get the ecache setsize for the current cpu.
513  */
514 #define	CPUSETSIZE()	(cpunodes[CPU->cpu_id].ecache_setsize)
515 
516 extern struct cpu	cpu0;
517 #define	CPU0		&cpu0
518 
519 #define	PAGE_BSZS_SHIFT(szc)	TTE_BSZS_SHIFT(szc)
520 /*
521  * For sfmmu each larger page is 8 times the size of the previous
522  * size page.
523  */
524 #define	FULL_REGION_CNT(rg_szc)	(8)
525 
526 /*
527  * The counter base must be per page_counter element to prevent
528  * races when re-indexing, and the base page size element should
529  * be aligned on a boundary of the given region size.
530  *
531  * We also round up the number of pages spanned by the counters
532  * for a given region to PC_BASE_ALIGN in certain situations to simplify
533  * the coding for some non-performance critical routines.
534  */
535 #define	PC_BASE_ALIGN		((pfn_t)1 << PAGE_BSZS_SHIFT(mmu_page_sizes-1))
536 #define	PC_BASE_ALIGN_MASK	(PC_BASE_ALIGN - 1)
537 
538 extern int ecache_alignsize;
539 #define	L2CACHE_ALIGN		ecache_alignsize
540 #define	L2CACHE_ALIGN_MAX	512
541 
542 extern int update_proc_pgcolorbase_after_fork;
543 extern int consistent_coloring;
544 extern uint_t vac_colors_mask;
545 extern int vac_size;
546 extern int vac_shift;
547 
548 /*
549  * Kernel mem segment in 64-bit space
550  */
551 extern caddr_t kmem64_base, kmem64_end, kmem64_aligned_end;
552 extern int kmem64_alignsize, kmem64_szc;
553 extern uint64_t kmem64_pabase;
554 extern int max_bootlp_tteszc;
555 
556 /*
557  * Maximum and default values for user heap, stack, private and shared
558  * anonymous memory, and user text and initialized data.
559  *
560  * Initial values are defined in architecture specific mach_vm_dep.c file.
561  * Used by map_pgsz*() routines.
562  */
563 extern size_t max_uheap_lpsize;
564 extern size_t default_uheap_lpsize;
565 extern size_t max_ustack_lpsize;
566 extern size_t default_ustack_lpsize;
567 extern size_t max_privmap_lpsize;
568 extern size_t max_uidata_lpsize;
569 extern size_t max_utext_lpsize;
570 extern size_t max_shm_lpsize;
571 
572 /*
573  * For adjusting the default lpsize, for DTLB-limited page sizes.
574  */
575 extern void adjust_data_maxlpsize(size_t ismpagesize);
576 
577 /*
578  * Sanity control. Don't use large pages regardless of user
579  * settings if there's less than priv or shm_lpg_min_physmem memory installed.
580  * The units for this variable are 8K pages.
581  */
582 extern pgcnt_t privm_lpg_min_physmem;
583 extern pgcnt_t shm_lpg_min_physmem;
584 
585 /*
586  * AS_2_BIN macro controls the page coloring policy.
587  * 0 (default) uses various vaddr bits
588  * 1 virtual=paddr
589  * 2 bin hopping
590  */
591 #define	AS_2_BIN(as, seg, vp, addr, bin, szc)				\
592 switch (consistent_coloring) {						\
593 	default:                                                        \
594 		cmn_err(CE_WARN,					\
595 			"AS_2_BIN: bad consistent coloring value");	\
596 		/* assume default algorithm -> continue */		\
597 	case 0: {                                                       \
598 		uint32_t ndx, new;					\
599 		int slew = 0;						\
600 		pfn_t pfn;                                              \
601                                                                         \
602 		if (vp != NULL && IS_SWAPVP(vp) &&			\
603 		    seg->s_ops == &segvn_ops)				\
604 			slew = as_color_bin(as);			\
605                                                                         \
606 		pfn = ((uintptr_t)addr >> MMU_PAGESHIFT) +		\
607 			(((uintptr_t)addr >> page_coloring_shift) <<	\
608 			(vac_shift - MMU_PAGESHIFT));			\
609 		if ((szc) == 0 || &page_pfn_2_color_cpu == NULL) {	\
610 			pfn += slew;					\
611 			bin = PFN_2_COLOR(pfn, szc, NULL);		\
612 		} else {						\
613 			bin = PFN_2_COLOR(pfn, szc, NULL);		\
614 			bin += slew >> (vac_shift - MMU_PAGESHIFT);	\
615 			bin &= hw_page_array[(szc)].hp_colors - 1;	\
616 		}							\
617 		break;                                                  \
618 	}                                                               \
619 	case 1:                                                         \
620 		bin = PFN_2_COLOR(((uintptr_t)addr >> MMU_PAGESHIFT),	\
621 		    szc, NULL);						\
622 		break;                                                  \
623 	case 2: {                                                       \
624 		int cnt = as_color_bin(as);				\
625 		uint_t color_mask = page_get_pagecolors(0) - 1;		\
626                                                                         \
627 		/* make sure physical color aligns with vac color */	\
628 		while ((cnt & vac_colors_mask) !=			\
629 		    addr_to_vcolor(addr)) {				\
630 			cnt++;						\
631 		}                                                       \
632 		bin = cnt = cnt & color_mask;			        \
633 		bin >>= PAGE_GET_COLOR_SHIFT(0, szc);                   \
634 		/* update per as page coloring fields */		\
635 		cnt = (cnt + 1) & color_mask;			        \
636 		if (cnt == (as_color_start(as) & color_mask)) {	        \
637 			cnt = as_color_start(as) = as_color_start(as) + \
638 				PGCLR_LOOPFACTOR;			\
639 		}                                                       \
640 		as_color_bin(as) = cnt & color_mask;		        \
641 		break;                                                  \
642 	}								\
643 }									\
644 	ASSERT(bin < page_get_pagecolors(szc));
645 
646 /*
647  * cpu private vm data - accessed thru CPU->cpu_vm_data
648  *	vc_pnum_memseg: tracks last memseg visited in page_numtopp_nolock()
649  *	vc_pnext_memseg: tracks last memseg visited in page_nextn()
650  *	vc_kmptr: unaligned kmem pointer for this vm_cpu_data_t
651  *	vc_kmsize: orignal kmem size for this vm_cpu_data_t
652  */
653 
654 typedef struct {
655 	struct memseg	*vc_pnum_memseg;
656 	struct memseg	*vc_pnext_memseg;
657 	void		*vc_kmptr;
658 	size_t		vc_kmsize;
659 } vm_cpu_data_t;
660 
661 /* allocation size to ensure vm_cpu_data_t resides in its own cache line */
662 #define	VM_CPU_DATA_PADSIZE						\
663 	(P2ROUNDUP(sizeof (vm_cpu_data_t), L2CACHE_ALIGN_MAX))
664 
665 /* for boot cpu before kmem is initialized */
666 extern char	vm_cpu_data0[];
667 
668 /*
669  * Function to get an ecache color bin: F(as, cnt, vcolor).
670  * the goal of this function is to:
671  * - to spread a processes' physical pages across the entire ecache to
672  *	maximize its use.
673  * - to minimize vac flushes caused when we reuse a physical page on a
674  *	different vac color than it was previously used.
675  * - to prevent all processes to use the same exact colors and trash each
676  *	other.
677  *
678  * cnt is a bin ptr kept on a per as basis.  As we page_create we increment
679  * the ptr so we spread out the physical pages to cover the entire ecache.
680  * The virtual color is made a subset of the physical color in order to
681  * in minimize virtual cache flushing.
682  * We add in the as to spread out different as.	 This happens when we
683  * initialize the start count value.
684  * sizeof(struct as) is 60 so we shift by 3 to get into the bit range
685  * that will tend to change.  For example, on spitfire based machines
686  * (vcshft == 1) contigous as are spread bu ~6 bins.
687  * vcshft provides for proper virtual color alignment.
688  * In theory cnt should be updated using cas only but if we are off by one
689  * or 2 it is no big deal.
690  * We also keep a start value which is used to randomize on what bin we
691  * start counting when it is time to start another loop. This avoids
692  * contigous allocations of ecache size to point to the same bin.
693  * Why 3? Seems work ok. Better than 7 or anything larger.
694  */
695 #define	PGCLR_LOOPFACTOR 3
696 
697 /*
698  * When a bin is empty, and we can't satisfy a color request correctly,
699  * we scan.  If we assume that the programs have reasonable spatial
700  * behavior, then it will not be a good idea to use the adjacent color.
701  * Using the adjacent color would result in virtually adjacent addresses
702  * mapping into the same spot in the cache.  So, if we stumble across
703  * an empty bin, skip a bunch before looking.  After the first skip,
704  * then just look one bin at a time so we don't miss our cache on
705  * every look. Be sure to check every bin.  Page_create() will panic
706  * if we miss a page.
707  *
708  * This also explains the `<=' in the for loops in both page_get_freelist()
709  * and page_get_cachelist().  Since we checked the target bin, skipped
710  * a bunch, then continued one a time, we wind up checking the target bin
711  * twice to make sure we get all of them bins.
712  */
713 #define	BIN_STEP	20
714 
715 #ifdef VM_STATS
716 struct vmm_vmstats_str {
717 	ulong_t pgf_alloc[MMU_PAGE_SIZES];	/* page_get_freelist */
718 	ulong_t pgf_allocok[MMU_PAGE_SIZES];
719 	ulong_t pgf_allocokrem[MMU_PAGE_SIZES];
720 	ulong_t pgf_allocfailed[MMU_PAGE_SIZES];
721 	ulong_t pgf_allocdeferred;
722 	ulong_t	pgf_allocretry[MMU_PAGE_SIZES];
723 	ulong_t pgc_alloc;			/* page_get_cachelist */
724 	ulong_t pgc_allocok;
725 	ulong_t pgc_allocokrem;
726 	ulong_t	pgc_allocokdeferred;
727 	ulong_t pgc_allocfailed;
728 	ulong_t	pgcp_alloc[MMU_PAGE_SIZES];	/* page_get_contig_pages */
729 	ulong_t	pgcp_allocfailed[MMU_PAGE_SIZES];
730 	ulong_t	pgcp_allocempty[MMU_PAGE_SIZES];
731 	ulong_t	pgcp_allocok[MMU_PAGE_SIZES];
732 	ulong_t	ptcp[MMU_PAGE_SIZES];		/* page_trylock_contig_pages */
733 	ulong_t	ptcpfreethresh[MMU_PAGE_SIZES];
734 	ulong_t	ptcpfailexcl[MMU_PAGE_SIZES];
735 	ulong_t	ptcpfailszc[MMU_PAGE_SIZES];
736 	ulong_t	ptcpfailcage[MMU_PAGE_SIZES];
737 	ulong_t	ptcpok[MMU_PAGE_SIZES];
738 	ulong_t	pgmf_alloc[MMU_PAGE_SIZES];	/* page_get_mnode_freelist */
739 	ulong_t	pgmf_allocfailed[MMU_PAGE_SIZES];
740 	ulong_t	pgmf_allocempty[MMU_PAGE_SIZES];
741 	ulong_t	pgmf_allocok[MMU_PAGE_SIZES];
742 	ulong_t	pgmc_alloc;			/* page_get_mnode_cachelist */
743 	ulong_t	pgmc_allocfailed;
744 	ulong_t	pgmc_allocempty;
745 	ulong_t	pgmc_allocok;
746 	ulong_t	pladd_free[MMU_PAGE_SIZES];	/* page_list_add/sub */
747 	ulong_t	plsub_free[MMU_PAGE_SIZES];
748 	ulong_t	pladd_cache;
749 	ulong_t	plsub_cache;
750 	ulong_t	plsubpages_szcbig;
751 	ulong_t	plsubpages_szc0;
752 	ulong_t	pfs_req[MMU_PAGE_SIZES];	/* page_freelist_split */
753 	ulong_t	pfs_demote[MMU_PAGE_SIZES];
754 	ulong_t	pfc_coalok[MMU_PAGE_SIZES][MAX_MNODE_MRANGES];
755 	ulong_t ppr_reloc[MMU_PAGE_SIZES];	/* page_relocate */
756 	ulong_t ppr_relocok[MMU_PAGE_SIZES];
757 	ulong_t ppr_relocnoroot[MMU_PAGE_SIZES];
758 	ulong_t ppr_reloc_replnoroot[MMU_PAGE_SIZES];
759 	ulong_t ppr_relocnolock[MMU_PAGE_SIZES];
760 	ulong_t ppr_relocnomem[MMU_PAGE_SIZES];
761 	ulong_t ppr_krelocfail[MMU_PAGE_SIZES];
762 	ulong_t ppr_copyfail;
763 	/* page coalesce counter */
764 	ulong_t	page_ctrs_coalesce[MMU_PAGE_SIZES][MAX_MNODE_MRANGES];
765 	/* candidates useful */
766 	ulong_t	page_ctrs_cands_skip[MMU_PAGE_SIZES][MAX_MNODE_MRANGES];
767 	/* ctrs changed after locking */
768 	ulong_t	page_ctrs_changed[MMU_PAGE_SIZES][MAX_MNODE_MRANGES];
769 	/* page_freelist_coalesce failed */
770 	ulong_t	page_ctrs_failed[MMU_PAGE_SIZES][MAX_MNODE_MRANGES];
771 	ulong_t	page_ctrs_coalesce_all;	/* page coalesce all counter */
772 	ulong_t	page_ctrs_cands_skip_all; /* candidates useful for all func */
773 };
774 extern struct vmm_vmstats_str vmm_vmstats;
775 #endif	/* VM_STATS */
776 
777 /*
778  * Used to hold off page relocations into the cage until OBP has completed
779  * its boot-time handoff of its resources to the kernel.
780  */
781 extern int page_relocate_ready;
782 
783 /*
784  * cpu/mmu-dependent vm variables may be reset at bootup.
785  */
786 extern uint_t mmu_page_sizes;
787 extern uint_t max_mmu_page_sizes;
788 extern uint_t mmu_hashcnt;
789 extern uint_t max_mmu_hashcnt;
790 extern size_t mmu_ism_pagesize;
791 extern int mmu_exported_pagesize_mask;
792 extern uint_t mmu_exported_page_sizes;
793 extern uint_t szc_2_userszc[];
794 extern uint_t userszc_2_szc[];
795 
796 #define	mmu_legacy_page_sizes	mmu_exported_page_sizes
797 #define	USERSZC_2_SZC(userszc)	(userszc_2_szc[userszc])
798 #define	SZC_2_USERSZC(szc)	(szc_2_userszc[szc])
799 
800 /*
801  * Platform specific page routines
802  */
803 extern void mach_page_add(page_t **, page_t *);
804 extern void mach_page_sub(page_t **, page_t *);
805 extern uint_t page_get_pagecolors(uint_t);
806 extern void ppcopy_kernel__relocatable(page_t *, page_t *);
807 #define	ppcopy_kernel(p1, p2)	ppcopy_kernel__relocatable(p1, p2)
808 
809 /*
810  * platform specific large pages for kernel heap support
811  */
812 extern size_t get_segkmem_lpsize(size_t lpsize);
813 extern size_t mmu_get_kernel_lpsize(size_t lpsize);
814 extern void mmu_init_kernel_pgsz(struct hat *hat);
815 extern void mmu_init_kcontext();
816 extern uint64_t kcontextreg;
817 
818 /*
819  * Nucleus data page allocator routines
820  */
821 extern void ndata_alloc_init(struct memlist *, uintptr_t, uintptr_t);
822 extern void *ndata_alloc(struct memlist *, size_t, size_t);
823 extern void *ndata_extra_base(struct memlist *, size_t, caddr_t);
824 extern size_t ndata_maxsize(struct memlist *);
825 extern size_t ndata_spare(struct memlist *, size_t, size_t);
826 
827 /*
828  * Platform specific support for non-coherent I-cache and soft exec
829  */
830 extern uint_t	icache_is_coherent;
831 extern uint_t	force_sync_icache_after_bcopy;
832 extern uint_t	force_sync_icache_after_dma;
833 
834 extern void	mach_setup_icache(uint_t);
835 #pragma weak	mach_setup_icache
836 
837 #ifdef	__cplusplus
838 }
839 #endif
840 
841 #endif	/* _VM_DEP_H */
842