xref: /illumos-gate/usr/src/uts/intel/io/vmm/intel/vmcs.h (revision a4955f4fa65e38d70c07d38e657a9aff43fa155f)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2011 NetApp, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 /*
32  * Copyright 2017 Joyent, Inc.
33  * Copyright 2022 Oxide Computer Company
34  */
35 
36 #ifndef _VMCS_H_
37 #define	_VMCS_H_
38 
39 #ifdef _KERNEL
40 #ifndef _ASM
41 struct vmcs {
42 	uint32_t	identifier;
43 	uint32_t	abort_code;
44 	char		_impl_specific[PAGE_SIZE - sizeof (uint32_t) * 2];
45 };
46 CTASSERT(sizeof (struct vmcs) == PAGE_SIZE);
47 
48 uint32_t vmcs_field_encoding(int ident);
49 void vmcs_seg_desc_encoding(int seg, uint32_t *base, uint32_t *lim,
50     uint32_t *acc);
51 uint32_t vmcs_msr_encoding(uint32_t msr);
52 
53 void vmcs_initialize(struct vmcs *vmcs, uintptr_t vmcs_pa);
54 
55 void vmcs_load(uintptr_t vmcs_pa);
56 void vmcs_clear(uintptr_t vmcs_pa);
57 
58 uint64_t vmcs_read(uint32_t encoding);
59 void vmcs_write(uint32_t encoding, uint64_t val);
60 
61 #endif	/* _ASM */
62 #endif	/* _KERNEL */
63 
64 #define	VMCS_INITIAL			0xffffffffffffffff
65 
66 /*
67  * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B.
68  */
69 #define	VMCS_INVALID_ENCODING		0xffffffff
70 
71 /* 16-bit control fields */
72 #define	VMCS_VPID			0x00000000
73 #define	VMCS_PIR_VECTOR			0x00000002
74 
75 /* 16-bit guest-state fields */
76 #define	VMCS_GUEST_ES_SELECTOR		0x00000800
77 #define	VMCS_GUEST_CS_SELECTOR		0x00000802
78 #define	VMCS_GUEST_SS_SELECTOR		0x00000804
79 #define	VMCS_GUEST_DS_SELECTOR		0x00000806
80 #define	VMCS_GUEST_FS_SELECTOR		0x00000808
81 #define	VMCS_GUEST_GS_SELECTOR		0x0000080A
82 #define	VMCS_GUEST_LDTR_SELECTOR	0x0000080C
83 #define	VMCS_GUEST_TR_SELECTOR		0x0000080E
84 #define	VMCS_GUEST_INTR_STATUS		0x00000810
85 
86 /* 16-bit host-state fields */
87 #define	VMCS_HOST_ES_SELECTOR		0x00000C00
88 #define	VMCS_HOST_CS_SELECTOR		0x00000C02
89 #define	VMCS_HOST_SS_SELECTOR		0x00000C04
90 #define	VMCS_HOST_DS_SELECTOR		0x00000C06
91 #define	VMCS_HOST_FS_SELECTOR		0x00000C08
92 #define	VMCS_HOST_GS_SELECTOR		0x00000C0A
93 #define	VMCS_HOST_TR_SELECTOR		0x00000C0C
94 
95 /* 64-bit control fields */
96 #define	VMCS_IO_BITMAP_A		0x00002000
97 #define	VMCS_IO_BITMAP_B		0x00002002
98 #define	VMCS_MSR_BITMAP			0x00002004
99 #define	VMCS_EXIT_MSR_STORE		0x00002006
100 #define	VMCS_EXIT_MSR_LOAD		0x00002008
101 #define	VMCS_ENTRY_MSR_LOAD		0x0000200A
102 #define	VMCS_EXECUTIVE_VMCS		0x0000200C
103 #define	VMCS_TSC_OFFSET			0x00002010
104 #define	VMCS_VIRTUAL_APIC		0x00002012
105 #define	VMCS_APIC_ACCESS		0x00002014
106 #define	VMCS_PIR_DESC			0x00002016
107 #define	VMCS_EPTP			0x0000201A
108 #define	VMCS_EOI_EXIT0			0x0000201C
109 #define	VMCS_EOI_EXIT1			0x0000201E
110 #define	VMCS_EOI_EXIT2			0x00002020
111 #define	VMCS_EOI_EXIT3			0x00002022
112 #define	VMCS_EOI_EXIT(vector)		(VMCS_EOI_EXIT0 + ((vector) / 64) * 2)
113 
114 /* 64-bit read-only fields */
115 #define	VMCS_GUEST_PHYSICAL_ADDRESS	0x00002400
116 
117 /* 64-bit guest-state fields */
118 #define	VMCS_LINK_POINTER		0x00002800
119 #define	VMCS_GUEST_IA32_DEBUGCTL	0x00002802
120 #define	VMCS_GUEST_IA32_PAT		0x00002804
121 #define	VMCS_GUEST_IA32_EFER		0x00002806
122 #define	VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808
123 #define	VMCS_GUEST_PDPTE0		0x0000280A
124 #define	VMCS_GUEST_PDPTE1		0x0000280C
125 #define	VMCS_GUEST_PDPTE2		0x0000280E
126 #define	VMCS_GUEST_PDPTE3		0x00002810
127 
128 /* 64-bit host-state fields */
129 #define	VMCS_HOST_IA32_PAT		0x00002C00
130 #define	VMCS_HOST_IA32_EFER		0x00002C02
131 #define	VMCS_HOST_IA32_PERF_GLOBAL_CTRL	0x00002C04
132 
133 /* 32-bit control fields */
134 #define	VMCS_PIN_BASED_CTLS		0x00004000
135 #define	VMCS_PRI_PROC_BASED_CTLS	0x00004002
136 #define	VMCS_EXCEPTION_BITMAP		0x00004004
137 #define	VMCS_PF_ERROR_MASK		0x00004006
138 #define	VMCS_PF_ERROR_MATCH		0x00004008
139 #define	VMCS_CR3_TARGET_COUNT		0x0000400A
140 #define	VMCS_EXIT_CTLS			0x0000400C
141 #define	VMCS_EXIT_MSR_STORE_COUNT	0x0000400E
142 #define	VMCS_EXIT_MSR_LOAD_COUNT	0x00004010
143 #define	VMCS_ENTRY_CTLS			0x00004012
144 #define	VMCS_ENTRY_MSR_LOAD_COUNT	0x00004014
145 #define	VMCS_ENTRY_INTR_INFO		0x00004016
146 #define	VMCS_ENTRY_EXCEPTION_ERROR	0x00004018
147 #define	VMCS_ENTRY_INST_LENGTH		0x0000401A
148 #define	VMCS_TPR_THRESHOLD		0x0000401C
149 #define	VMCS_SEC_PROC_BASED_CTLS	0x0000401E
150 #define	VMCS_PLE_GAP			0x00004020
151 #define	VMCS_PLE_WINDOW			0x00004022
152 
153 /* 32-bit read-only data fields */
154 #define	VMCS_INSTRUCTION_ERROR		0x00004400
155 #define	VMCS_EXIT_REASON		0x00004402
156 #define	VMCS_EXIT_INTR_INFO		0x00004404
157 #define	VMCS_EXIT_INTR_ERRCODE		0x00004406
158 #define	VMCS_IDT_VECTORING_INFO		0x00004408
159 #define	VMCS_IDT_VECTORING_ERROR	0x0000440A
160 #define	VMCS_EXIT_INSTRUCTION_LENGTH	0x0000440C
161 #define	VMCS_EXIT_INSTRUCTION_INFO	0x0000440E
162 
163 /* 32-bit guest-state fields */
164 #define	VMCS_GUEST_ES_LIMIT		0x00004800
165 #define	VMCS_GUEST_CS_LIMIT		0x00004802
166 #define	VMCS_GUEST_SS_LIMIT		0x00004804
167 #define	VMCS_GUEST_DS_LIMIT		0x00004806
168 #define	VMCS_GUEST_FS_LIMIT		0x00004808
169 #define	VMCS_GUEST_GS_LIMIT		0x0000480A
170 #define	VMCS_GUEST_LDTR_LIMIT		0x0000480C
171 #define	VMCS_GUEST_TR_LIMIT		0x0000480E
172 #define	VMCS_GUEST_GDTR_LIMIT		0x00004810
173 #define	VMCS_GUEST_IDTR_LIMIT		0x00004812
174 #define	VMCS_GUEST_ES_ACCESS_RIGHTS	0x00004814
175 #define	VMCS_GUEST_CS_ACCESS_RIGHTS	0x00004816
176 #define	VMCS_GUEST_SS_ACCESS_RIGHTS	0x00004818
177 #define	VMCS_GUEST_DS_ACCESS_RIGHTS	0x0000481A
178 #define	VMCS_GUEST_FS_ACCESS_RIGHTS	0x0000481C
179 #define	VMCS_GUEST_GS_ACCESS_RIGHTS	0x0000481E
180 #define	VMCS_GUEST_LDTR_ACCESS_RIGHTS	0x00004820
181 #define	VMCS_GUEST_TR_ACCESS_RIGHTS	0x00004822
182 #define	VMCS_GUEST_INTERRUPTIBILITY	0x00004824
183 #define	VMCS_GUEST_ACTIVITY		0x00004826
184 #define	VMCS_GUEST_SMBASE		0x00004828
185 #define	VMCS_GUEST_IA32_SYSENTER_CS	0x0000482A
186 #define	VMCS_PREEMPTION_TIMER_VALUE	0x0000482E
187 
188 /* 32-bit host state fields */
189 #define	VMCS_HOST_IA32_SYSENTER_CS	0x00004C00
190 
191 /* Natural Width control fields */
192 #define	VMCS_CR0_MASK			0x00006000
193 #define	VMCS_CR4_MASK			0x00006002
194 #define	VMCS_CR0_SHADOW			0x00006004
195 #define	VMCS_CR4_SHADOW			0x00006006
196 #define	VMCS_CR3_TARGET0		0x00006008
197 #define	VMCS_CR3_TARGET1		0x0000600A
198 #define	VMCS_CR3_TARGET2		0x0000600C
199 #define	VMCS_CR3_TARGET3		0x0000600E
200 
201 /* Natural Width read-only fields */
202 #define	VMCS_EXIT_QUALIFICATION		0x00006400
203 #define	VMCS_IO_RCX			0x00006402
204 #define	VMCS_IO_RSI			0x00006404
205 #define	VMCS_IO_RDI			0x00006406
206 #define	VMCS_IO_RIP			0x00006408
207 #define	VMCS_GUEST_LINEAR_ADDRESS	0x0000640A
208 
209 /* Natural Width guest-state fields */
210 #define	VMCS_GUEST_CR0			0x00006800
211 #define	VMCS_GUEST_CR3			0x00006802
212 #define	VMCS_GUEST_CR4			0x00006804
213 #define	VMCS_GUEST_ES_BASE		0x00006806
214 #define	VMCS_GUEST_CS_BASE		0x00006808
215 #define	VMCS_GUEST_SS_BASE		0x0000680A
216 #define	VMCS_GUEST_DS_BASE		0x0000680C
217 #define	VMCS_GUEST_FS_BASE		0x0000680E
218 #define	VMCS_GUEST_GS_BASE		0x00006810
219 #define	VMCS_GUEST_LDTR_BASE		0x00006812
220 #define	VMCS_GUEST_TR_BASE		0x00006814
221 #define	VMCS_GUEST_GDTR_BASE		0x00006816
222 #define	VMCS_GUEST_IDTR_BASE		0x00006818
223 #define	VMCS_GUEST_DR7			0x0000681A
224 #define	VMCS_GUEST_RSP			0x0000681C
225 #define	VMCS_GUEST_RIP			0x0000681E
226 #define	VMCS_GUEST_RFLAGS		0x00006820
227 #define	VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822
228 #define	VMCS_GUEST_IA32_SYSENTER_ESP	0x00006824
229 #define	VMCS_GUEST_IA32_SYSENTER_EIP	0x00006826
230 
231 /* Natural Width host-state fields */
232 #define	VMCS_HOST_CR0			0x00006C00
233 #define	VMCS_HOST_CR3			0x00006C02
234 #define	VMCS_HOST_CR4			0x00006C04
235 #define	VMCS_HOST_FS_BASE		0x00006C06
236 #define	VMCS_HOST_GS_BASE		0x00006C08
237 #define	VMCS_HOST_TR_BASE		0x00006C0A
238 #define	VMCS_HOST_GDTR_BASE		0x00006C0C
239 #define	VMCS_HOST_IDTR_BASE		0x00006C0E
240 #define	VMCS_HOST_IA32_SYSENTER_ESP	0x00006C10
241 #define	VMCS_HOST_IA32_SYSENTER_EIP	0x00006C12
242 #define	VMCS_HOST_RSP			0x00006C14
243 #define	VMCS_HOST_RIP			0x00006c16
244 
245 /*
246  * VM instruction error numbers
247  */
248 #define	VMRESUME_WITH_NON_LAUNCHED_VMCS	5
249 
250 /*
251  * Bits 15:0 of VMCS_EXIT_REASON field represent the "basic exit reason", as
252  * detailed below.
253  */
254 #define	BASIC_EXIT_REASON_MASK	0xffff
255 
256 /*
257  * VMCS (basic) exit reasons
258  */
259 #define	EXIT_REASON_EXCEPTION		0
260 #define	EXIT_REASON_EXT_INTR		1
261 #define	EXIT_REASON_TRIPLE_FAULT	2
262 #define	EXIT_REASON_INIT		3
263 #define	EXIT_REASON_SIPI		4
264 #define	EXIT_REASON_IO_SMI		5
265 #define	EXIT_REASON_SMI			6
266 #define	EXIT_REASON_INTR_WINDOW		7
267 #define	EXIT_REASON_NMI_WINDOW		8
268 #define	EXIT_REASON_TASK_SWITCH		9
269 #define	EXIT_REASON_CPUID		10
270 #define	EXIT_REASON_GETSEC		11
271 #define	EXIT_REASON_HLT			12
272 #define	EXIT_REASON_INVD		13
273 #define	EXIT_REASON_INVLPG		14
274 #define	EXIT_REASON_RDPMC		15
275 #define	EXIT_REASON_RDTSC		16
276 #define	EXIT_REASON_RSM			17
277 #define	EXIT_REASON_VMCALL		18
278 #define	EXIT_REASON_VMCLEAR		19
279 #define	EXIT_REASON_VMLAUNCH		20
280 #define	EXIT_REASON_VMPTRLD		21
281 #define	EXIT_REASON_VMPTRST		22
282 #define	EXIT_REASON_VMREAD		23
283 #define	EXIT_REASON_VMRESUME		24
284 #define	EXIT_REASON_VMWRITE		25
285 #define	EXIT_REASON_VMXOFF		26
286 #define	EXIT_REASON_VMXON		27
287 #define	EXIT_REASON_CR_ACCESS		28
288 #define	EXIT_REASON_DR_ACCESS		29
289 #define	EXIT_REASON_INOUT		30
290 #define	EXIT_REASON_RDMSR		31
291 #define	EXIT_REASON_WRMSR		32
292 #define	EXIT_REASON_INVAL_VMCS		33
293 #define	EXIT_REASON_INVAL_MSR		34
294 #define	EXIT_REASON_MWAIT		36
295 #define	EXIT_REASON_MTF			37
296 #define	EXIT_REASON_MONITOR		39
297 #define	EXIT_REASON_PAUSE		40
298 #define	EXIT_REASON_MCE_DURING_ENTRY	41
299 #define	EXIT_REASON_TPR			43
300 #define	EXIT_REASON_APIC_ACCESS		44
301 #define	EXIT_REASON_VIRTUALIZED_EOI	45
302 #define	EXIT_REASON_GDTR_IDTR		46
303 #define	EXIT_REASON_LDTR_TR		47
304 #define	EXIT_REASON_EPT_FAULT		48
305 #define	EXIT_REASON_EPT_MISCONFIG	49
306 #define	EXIT_REASON_INVEPT		50
307 #define	EXIT_REASON_RDTSCP		51
308 #define	EXIT_REASON_VMX_PREEMPT		52
309 #define	EXIT_REASON_INVVPID		53
310 #define	EXIT_REASON_WBINVD		54
311 #define	EXIT_REASON_XSETBV		55
312 #define	EXIT_REASON_APIC_WRITE		56
313 #define	EXIT_REASON_RDRAND		57
314 #define	EXIT_REASON_INVPCID		58
315 #define	EXIT_REASON_VMFUNC		59
316 #define	EXIT_REASON_ENCLS		60
317 #define	EXIT_REASON_RDSEED		61
318 #define	EXIT_REASON_PM_LOG_FULL		62
319 #define	EXIT_REASON_XSAVES		63
320 #define	EXIT_REASON_XRSTORS		64
321 
322 /*
323  * NMI unblocking due to IRET.
324  *
325  * Applies to VM-exits due to hardware exception or EPT fault.
326  */
327 #define	EXIT_QUAL_NMIUDTI	(1 << 12)
328 /*
329  * VMCS interrupt information fields
330  */
331 #define	VMCS_INTR_VALID		(1U << 31)
332 #define	VMCS_INTR_T_MASK	0x700		/* Interruption-info type */
333 #define	VMCS_INTR_T_HWINTR	(0 << 8)
334 #define	VMCS_INTR_T_NMI		(2 << 8)
335 #define	VMCS_INTR_T_HWEXCEPTION	(3 << 8)
336 #define	VMCS_INTR_T_SWINTR	(4 << 8)
337 #define	VMCS_INTR_T_PRIV_SWEXCEPTION (5 << 8)
338 #define	VMCS_INTR_T_SWEXCEPTION	(6 << 8)
339 #define	VMCS_INTR_DEL_ERRCODE	(1 << 11)
340 
341 /*
342  * VMCS IDT-Vectoring information fields
343  */
344 #define	VMCS_IDT_VEC_VALID		(1U << 31)
345 #define	VMCS_IDT_VEC_ERRCODE_VALID	(1 << 11)
346 
347 /*
348  * VMCS Guest interruptibility field
349  */
350 #define	VMCS_INTERRUPTIBILITY_STI_BLOCKING	(1 << 0)
351 #define	VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING	(1 << 1)
352 #define	VMCS_INTERRUPTIBILITY_SMI_BLOCKING	(1 << 2)
353 #define	VMCS_INTERRUPTIBILITY_NMI_BLOCKING	(1 << 3)
354 
355 /*
356  * Exit qualification for EXIT_REASON_INVAL_VMCS
357  */
358 #define	EXIT_QUAL_NMI_WHILE_STI_BLOCKING	3
359 
360 /*
361  * Exit qualification for EPT violation
362  */
363 #define	EPT_VIOLATION_DATA_READ		(1UL << 0)
364 #define	EPT_VIOLATION_DATA_WRITE	(1UL << 1)
365 #define	EPT_VIOLATION_INST_FETCH	(1UL << 2)
366 #define	EPT_VIOLATION_GPA_READABLE	(1UL << 3)
367 #define	EPT_VIOLATION_GPA_WRITEABLE	(1UL << 4)
368 #define	EPT_VIOLATION_GPA_EXECUTABLE	(1UL << 5)
369 #define	EPT_VIOLATION_GLA_VALID		(1UL << 7)
370 #define	EPT_VIOLATION_XLAT_VALID	(1UL << 8)
371 
372 /*
373  * Exit qualification for APIC-access VM exit
374  */
375 #define	APIC_ACCESS_OFFSET(qual)	((qual) & 0xFFF)
376 #define	APIC_ACCESS_TYPE(qual)		(((qual) >> 12) & 0xF)
377 
378 /*
379  * Exit qualification for APIC-write VM exit
380  */
381 #define	APIC_WRITE_OFFSET(qual)		((qual) & 0xFFF)
382 
383 #endif
384