1# 2# CDDL HEADER START 3# 4# The contents of this file are subject to the terms of the 5# Common Development and Distribution License (the "License"). 6# You may not use this file except in compliance with the License. 7# 8# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9# or http://www.opensolaris.org/os/licensing. 10# See the License for the specific language governing permissions 11# and limitations under the License. 12# 13# When distributing Covered Code, include this CDDL HEADER in each 14# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15# If applicable, add the following below this CDDL HEADER, with the 16# fields enclosed by brackets "[]" replaced with your own identifying 17# information: Portions Copyright [yyyy] [name of copyright owner] 18# 19# CDDL HEADER END 20# 21# 22# Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved. 23# 24# Copyright 2019, Joyent, Inc. 25# 26# This Makefile builds 27# the Intel Core Architecture Performance Counter BackEnd (PCBE). 28# 29 30UTSBASE = ../.. 31 32# 33# The following objects are autogenerated by cpcgen. 34# 35CPCGEN_OBJS = \ 36 core_pcbe_cpcgen.o \ 37 core_pcbe_bdw_de.o \ 38 core_pcbe_bdw.o \ 39 core_pcbe_bdx.o \ 40 core_pcbe_bnl.o \ 41 core_pcbe_clx.o \ 42 core_pcbe_glm.o \ 43 core_pcbe_glp.o \ 44 core_pcbe_hsw.o \ 45 core_pcbe_hsx.o \ 46 core_pcbe_ivb.o \ 47 core_pcbe_ivt.o \ 48 core_pcbe_jkt.o \ 49 core_pcbe_nhm_ep.o \ 50 core_pcbe_nhm_ex.o \ 51 core_pcbe_skl.o \ 52 core_pcbe_skx.o \ 53 core_pcbe_slm.o \ 54 core_pcbe_snb.o \ 55 core_pcbe_wsm_ep_dp.o \ 56 core_pcbe_wsm_ep_sp.o \ 57 core_pcbe_wsm_ex.o 58 59CPCGEN_COMMON = core_pcbe_cpcgen.c 60CPCGEN_CMD = $(CPCGEN) -d $(SRC)/data/perfmon -o . 61CPCGEN_SRCS = $(CPCGEN_OBJS:%.o=%.c) core_pcbe_cpcgen.h 62 63# 64# Define module and object file sets. 65# 66MODULE = pcbe.GenuineIntel.6.15 67OBJECTS = $(CORE_PCBE_OBJS:%=$(OBJS_DIR)/%) 68OBJECTS += $(CPCGEN_OBJS:%=$(OBJS_DIR)/%) 69LINTS = $(CORE_PCBE_OBJS:%.o=$(LINTS_DIR)/%.ln) 70ROOTMODULE = $(USR_PCBE_DIR)/$(MODULE) 71 72# 73# This order matches the families declared in uts/intel/sys/x86_archext.h. 74# 75SOFTLINKS = \ 76 pcbe.GenuineIntel.6.23 \ 77 pcbe.GenuineIntel.6.29 \ 78 pcbe.GenuineIntel.6.30 \ 79 pcbe.GenuineIntel.6.31 \ 80 pcbe.GenuineIntel.6.26 \ 81 pcbe.GenuineIntel.6.46 \ 82 pcbe.GenuineIntel.6.37 \ 83 pcbe.GenuineIntel.6.44 \ 84 pcbe.GenuineIntel.6.47 \ 85 pcbe.GenuineIntel.6.42 \ 86 pcbe.GenuineIntel.6.45 \ 87 pcbe.GenuineIntel.6.58 \ 88 pcbe.GenuineIntel.6.62 \ 89 pcbe.GenuineIntel.6.60 \ 90 pcbe.GenuineIntel.6.69 \ 91 pcbe.GenuineIntel.6.70 \ 92 pcbe.GenuineIntel.6.63 \ 93 pcbe.GenuineIntel.6.61 \ 94 pcbe.GenuineIntel.6.71 \ 95 pcbe.GenuineIntel.6.79 \ 96 pcbe.GenuineIntel.6.86 \ 97 pcbe.GenuineIntel.6.78 \ 98 pcbe.GenuineIntel.6.85 \ 99 pcbe.GenuineIntel.6.94 \ 100 pcbe.GenuineIntel.6.142 \ 101 pcbe.GenuineIntel.6.158 \ 102 pcbe.GenuineIntel.6.28 \ 103 pcbe.GenuineIntel.6.38 \ 104 pcbe.GenuineIntel.6.39 \ 105 pcbe.GenuineIntel.6.53 \ 106 pcbe.GenuineIntel.6.54 \ 107 pcbe.GenuineIntel.6.55 \ 108 pcbe.GenuineIntel.6.77 \ 109 pcbe.GenuineIntel.6.76 \ 110 pcbe.GenuineIntel.6.92 \ 111 pcbe.GenuineIntel.6.95 \ 112 pcbe.GenuineIntel.6.122 113 114ROOTSOFTLINKS = $(SOFTLINKS:%=$(USR_PCBE_DIR)/%) 115 116# 117# Include common rules. 118# 119include $(UTSBASE)/intel/Makefile.intel 120 121CERRWARN += $(CNOWARN_UNINIT) 122CERRWARN += -_gcc=-Wno-unused-variable 123 124CPPFLAGS += -I$(UTSBASE)/intel/core_pcbe 125CLEANFILES += $(CPCGEN_SRCS) 126 127# 128# Define targets. 129# 130ALL_TARGET = $(CPCGEN_COMMON) .WAIT $(BINARY) 131LINT_MODULE = core_pcbe 132LINT_TARGET = $(LINT_MODULE).lint 133INSTALL_TARGET = $(CPCGEN_COMMON) .WAIT $(BINARY) $(ROOTMODULE) $(ROOTSOFTLINKS) 134 135# 136# Default build targets. 137# 138.KEEP_STATE: 139 140def: $(DEF_DEPS) 141 142all: $(ALL_DEPS) 143 144clean: $(CLEAN_DEPS) 145 146clobber: $(CLOBBER_DEPS) 147 148lint: $(LINT_DEPS) 149 150modlintlib: $(MODLINTLIB_DEPS) 151 152clean.lint: $(CLEAN_LINT_DEPS) 153 154install: $(INSTALL_DEPS) 155 156$(ROOTSOFTLINKS): $(ROOTMODULE) 157 -$(RM) $@; $(SYMLINK) $(MODULE) $@ 158 159core_pcbe_cpcgen.c: 160 $(CPCGEN_CMD) -a -H 161 162core_pcbe_%.c: $(CPCGEN_COMMON) 163 $(CPCGEN_CMD) -c -p \ 164 $$(echo $@ | \ 165 $(SED) -e 's/core_pcbe_//g' -e 's/_/-/g' -e 's/.c$$//g') 166 167$(OBJS_DIR)/%.o: %.c 168 $(COMPILE.c) -I$(SRC)/uts/intel/pcbe/ -o $@ $< 169 $(CTFCONVERT_O) 170 171# 172# Include common targets. 173# 174include $(UTSBASE)/intel/Makefile.targ 175