xref: /illumos-gate/usr/src/uts/intel/core_pcbe/Makefile (revision 78f846c0ab4f41678386d3e1b49c16cc8db07a8b)
1#
2# CDDL HEADER START
3#
4# The contents of this file are subject to the terms of the
5# Common Development and Distribution License (the "License").
6# You may not use this file except in compliance with the License.
7#
8# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9# or http://www.opensolaris.org/os/licensing.
10# See the License for the specific language governing permissions
11# and limitations under the License.
12#
13# When distributing Covered Code, include this CDDL HEADER in each
14# file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15# If applicable, add the following below this CDDL HEADER, with the
16# fields enclosed by brackets "[]" replaced with your own identifying
17# information: Portions Copyright [yyyy] [name of copyright owner]
18#
19# CDDL HEADER END
20#
21#
22# Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
23#
24# Copyright 2019, Joyent, Inc.
25#
26# This Makefile builds
27# the Intel Core Architecture Performance Counter BackEnd (PCBE).
28#
29
30UTSBASE = ../..
31
32#
33# The following objects are autogenerated by cpcgen.
34#
35CPCGEN_OBJS	= \
36	core_pcbe_cpcgen.o	\
37	core_pcbe_bdw_de.o	\
38	core_pcbe_bdw.o		\
39	core_pcbe_bdx.o		\
40	core_pcbe_bnl.o		\
41	core_pcbe_clx.o		\
42	core_pcbe_glm.o		\
43	core_pcbe_glp.o		\
44	core_pcbe_hsw.o		\
45	core_pcbe_hsx.o		\
46	core_pcbe_ivb.o		\
47	core_pcbe_ivt.o		\
48	core_pcbe_jkt.o		\
49	core_pcbe_nhm_ep.o	\
50	core_pcbe_nhm_ex.o	\
51	core_pcbe_skl.o		\
52	core_pcbe_skx.o		\
53	core_pcbe_slm.o		\
54	core_pcbe_snb.o		\
55	core_pcbe_wsm_ep_dp.o	\
56	core_pcbe_wsm_ep_sp.o	\
57	core_pcbe_wsm_ex.o
58
59CPCGEN_COMMON	= core_pcbe_cpcgen.c
60CPCGEN_CMD	= $(CPCGEN) -d $(SRC)/data/perfmon -o .
61CPCGEN_SRCS	= $(CPCGEN_OBJS:%.o=%.c) core_pcbe_cpcgen.h
62
63#
64#	Define module and object file sets.
65#
66MODULE		= pcbe.GenuineIntel.6.15
67OBJECTS		= $(CORE_PCBE_OBJS:%=$(OBJS_DIR)/%)
68OBJECTS		+= $(CPCGEN_OBJS:%=$(OBJS_DIR)/%)
69ROOTMODULE	= $(USR_PCBE_DIR)/$(MODULE)
70
71#
72# This order matches the families declared in uts/intel/sys/x86_archext.h.
73#
74SOFTLINKS	= \
75		pcbe.GenuineIntel.6.23	\
76		pcbe.GenuineIntel.6.29	\
77		pcbe.GenuineIntel.6.30	\
78		pcbe.GenuineIntel.6.31	\
79		pcbe.GenuineIntel.6.26	\
80		pcbe.GenuineIntel.6.46	\
81		pcbe.GenuineIntel.6.37	\
82		pcbe.GenuineIntel.6.44	\
83		pcbe.GenuineIntel.6.47	\
84		pcbe.GenuineIntel.6.42	\
85		pcbe.GenuineIntel.6.45	\
86		pcbe.GenuineIntel.6.58	\
87		pcbe.GenuineIntel.6.62	\
88		pcbe.GenuineIntel.6.60	\
89		pcbe.GenuineIntel.6.69	\
90		pcbe.GenuineIntel.6.70	\
91		pcbe.GenuineIntel.6.63	\
92		pcbe.GenuineIntel.6.61	\
93		pcbe.GenuineIntel.6.71	\
94		pcbe.GenuineIntel.6.79	\
95		pcbe.GenuineIntel.6.86	\
96		pcbe.GenuineIntel.6.78	\
97		pcbe.GenuineIntel.6.85	\
98		pcbe.GenuineIntel.6.94	\
99		pcbe.GenuineIntel.6.142	\
100		pcbe.GenuineIntel.6.158	\
101		pcbe.GenuineIntel.6.28	\
102		pcbe.GenuineIntel.6.38	\
103		pcbe.GenuineIntel.6.39	\
104		pcbe.GenuineIntel.6.53	\
105		pcbe.GenuineIntel.6.54	\
106		pcbe.GenuineIntel.6.55	\
107		pcbe.GenuineIntel.6.77	\
108		pcbe.GenuineIntel.6.76	\
109		pcbe.GenuineIntel.6.92	\
110		pcbe.GenuineIntel.6.95	\
111		pcbe.GenuineIntel.6.122
112
113ROOTSOFTLINKS	= $(SOFTLINKS:%=$(USR_PCBE_DIR)/%)
114
115#
116#	Include common rules.
117#
118include $(UTSBASE)/intel/Makefile.intel
119
120CERRWARN	+= $(CNOWARN_UNINIT)
121CERRWARN	+= -_gcc=-Wno-unused-variable
122
123CPPFLAGS	+= -I$(UTSBASE)/intel/core_pcbe
124CLEANFILES	+= $(CPCGEN_SRCS)
125
126#
127#	Define targets.
128#
129ALL_TARGET	= $(CPCGEN_COMMON) .WAIT $(BINARY)
130INSTALL_TARGET	= $(CPCGEN_COMMON) .WAIT $(BINARY) $(ROOTMODULE) $(ROOTSOFTLINKS)
131
132#
133#	Default build targets.
134#
135.KEEP_STATE:
136
137def:		$(DEF_DEPS)
138
139all:		$(ALL_DEPS)
140
141clean:		$(CLEAN_DEPS)
142
143clobber:	$(CLOBBER_DEPS)
144
145install:	$(INSTALL_DEPS)
146
147$(ROOTSOFTLINKS):	$(ROOTMODULE)
148	-$(RM) $@; $(SYMLINK) $(MODULE) $@
149
150core_pcbe_cpcgen.c:
151	$(CPCGEN_CMD) -a -H
152
153core_pcbe_%.c: $(CPCGEN_COMMON)
154	$(CPCGEN_CMD) -c -p \
155	    $$(echo $@ | \
156	    $(SED) -e 's/core_pcbe_//g' -e 's/_/-/g' -e 's/.c$$//g')
157
158$(OBJS_DIR)/%.o: %.c
159	$(COMPILE.c) -I$(SRC)/uts/intel/pcbe/ -o $@ $<
160	$(CTFCONVERT_O)
161
162#
163#	Include common targets.
164#
165include $(UTSBASE)/intel/Makefile.targ
166