1 /*- 2 * Copyright (c) 2012-2015 LSI Corp. 3 * Copyright (c) 2013-2016 Avago Technologies 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of any co-contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * Copyright (c) 2012-2015 LSI Corporation. 33 * Copyright (c) 2013-2016 Avago Technologies 34 * All rights reserved. 35 * 36 * 37 * Name: mpi2_ra.h 38 * Title: MPI RAID Accelerator messages and structures 39 * Creation Date: April 13, 2009 40 * 41 * mpi2_ra.h Version: 02.00.01 42 * 43 * Version History 44 * --------------- 45 * 46 * Date Version Description 47 * -------- -------- ------------------------------------------------------ 48 * 05-06-09 02.00.00 Initial version. 49 * 11-18-14 02.00.01 Updated copyright information. 50 * -------------------------------------------------------------------------- 51 */ 52 53 #ifndef MPI2_RA_H 54 #define MPI2_RA_H 55 56 /* generic structure for RAID Accelerator Control Block */ 57 typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK 58 { 59 U32 Reserved[8]; /* 0x00 */ 60 U32 RaidAcceleratorCDB[1]; /* 0x20 */ 61 } MPI2_RAID_ACCELERATOR_CONTROL_BLOCK, 62 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK, 63 Mpi2RAIDAcceleratorControlBlock_t, 64 MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t; 65 66 67 /****************************************************************************** 68 * 69 * RAID Accelerator Messages 70 * 71 *******************************************************************************/ 72 73 /* RAID Accelerator Request Message */ 74 typedef struct _MPI2_RAID_ACCELERATOR_REQUEST 75 { 76 U16 Reserved0; /* 0x00 */ 77 U8 ChainOffset; /* 0x02 */ 78 U8 Function; /* 0x03 */ 79 U16 Reserved1; /* 0x04 */ 80 U8 Reserved2; /* 0x06 */ 81 U8 MsgFlags; /* 0x07 */ 82 U8 VP_ID; /* 0x08 */ 83 U8 VF_ID; /* 0x09 */ 84 U16 Reserved3; /* 0x0A */ 85 U64 RaidAcceleratorControlBlockAddress; /* 0x0C */ 86 U8 DmaEngineNumber; /* 0x14 */ 87 U8 Reserved4; /* 0x15 */ 88 U16 Reserved5; /* 0x16 */ 89 U32 Reserved6; /* 0x18 */ 90 U32 Reserved7; /* 0x1C */ 91 U32 Reserved8; /* 0x20 */ 92 } MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST, 93 Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t; 94 95 96 /* RAID Accelerator Error Reply Message */ 97 typedef struct _MPI2_RAID_ACCELERATOR_REPLY 98 { 99 U16 Reserved0; /* 0x00 */ 100 U8 MsgLength; /* 0x02 */ 101 U8 Function; /* 0x03 */ 102 U16 Reserved1; /* 0x04 */ 103 U8 Reserved2; /* 0x06 */ 104 U8 MsgFlags; /* 0x07 */ 105 U8 VP_ID; /* 0x08 */ 106 U8 VF_ID; /* 0x09 */ 107 U16 Reserved3; /* 0x0A */ 108 U16 Reserved4; /* 0x0C */ 109 U16 IOCStatus; /* 0x0E */ 110 U32 IOCLogInfo; /* 0x10 */ 111 U32 ProductSpecificData[3]; /* 0x14 */ 112 } MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY, 113 Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t; 114 115 116 #endif 117 118 119