xref: /illumos-gate/usr/src/uts/common/sys/ib/adapters/hermon/hermon_misc.h (revision bdf0047c9427cca40961a023475891c898579c37)
1 /*
2  * CDDL HEADER START
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4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
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13  * When distributing Covered Code, include this CDDL HEADER in each
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19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_IB_ADAPTERS_HERMON_MISC_H
28 #define	_SYS_IB_ADAPTERS_HERMON_MISC_H
29 
30 /*
31  * hermon_misc.h
32  *    Contains all of the prototypes, #defines, and structures necessary
33  *    for the Hermon Miscellaneous routines - Address Handle, Multicast,
34  *    Protection Domain, port-related, statistics (kstat) routines, and
35  *    extra VTS related routines.
36  *    Many of these functions are called by other parts of the Hermon driver
37  *    (and several routines are directly exposed through the IBTF CI
38  *    interface and/or kstat interface).
39  */
40 
41 #include <sys/types.h>
42 #include <sys/conf.h>
43 #include <sys/ddi.h>
44 #include <sys/sunddi.h>
45 
46 #include <sys/ib/adapters/hermon/hermon_typedef.h>
47 #include <sys/ib/adapters/hermon/hermon_ioctl.h>
48 #include <sys/ib/adapters/hermon/hermon_rsrc.h>
49 #include <sys/ib/adapters/hermon/hermon_hw.h>
50 
51 
52 #ifdef __cplusplus
53 extern "C" {
54 #endif
55 
56 /*
57  * The following defines specify the default number of Address Handles (AH)
58  * and their size (in the hardware).  By default the maximum number of address
59  * handles is set to 32K.  This value is controllable through the
60  * "hermon_log_num_ah" configuration variable.  Note:  Hermon Address Handles
61  * are also referred to as UD Address Vectors (UDAV).
62  */
63 #define	HERMON_NUM_AH_SHIFT		0xF
64 #define	HERMON_NUM_AH			(1 << HERMON_NUM_AH_SHIFT)
65 #define	HERMON_UDAV_SIZE_SHIFT		0x5
66 #define	HERMON_UDAV_SIZE			(1 << HERMON_UDAV_SIZE_SHIFT)
67 
68 /*
69  * The following macro determines whether the contents of a UDAV need to be
70  * sync'd (with ddi_dma_sync()).  This decision is based on whether the
71  * UDAV is in DDR memory (no sync) or system memory (sync required).
72  */
73 
74 #define	HERMON_UDAV_IS_SYNC_REQ(state)					\
75 	(((&((state)->ts_rsrc_hdl[HERMON_UDAV]))->rsrc_loc ==		\
76 	HERMON_IN_DDR) ? 0 : 1)
77 
78 /*
79  * These defines are used by hermon_get_addr_path() and hermon_set_addr_path()
80  * below.  They indicate the type of hardware context being passed in the
81  * "path" argument.  Because the Hermon hardware formats for the QP address
82  * path and UDAV address path structures is so similar, but not exactly the
83  * same, we use these flags to indicate which type of structure is being
84  * read from or written to.
85  */
86 #define	HERMON_ADDRPATH_QP		0x0
87 #define	HERMON_ADDRPATH_UDAV		0x1
88 
89 /*
90  * The following defines specify the default number of Multicast Groups (MCG)
91  * and the maximum number of QP which can be associated with each.  By default
92  * the maximum number of multicast groups is set to 256, and the maximum number
93  * of QP per multicast group is set to 248 (256 4-byte slots minus the 8 slots
94  * in the header).  The first of these values is controllable through the
95  * "hermon_log_num_mcg" configuration variable.  "hermon_num_qp_per_mcg" is
96  * also available if the customer needs such a large capability.
97  */
98 #define	HERMON_NUM_MCG_SHIFT		0x8
99 #define	HERMON_NUM_QP_PER_MCG_MIN	0x8
100 #define	HERMON_NUM_QP_PER_MCG		0xf8
101 
102 #define	HERMON_MCGMEM_SZ(state)						\
103 	((((state)->hs_cfg_profile->cp_num_qp_per_mcg) + 8) << 2)
104 
105 /*
106  * Macro to compute the offset of the QP list in a given MCG entry.
107  */
108 #define	HERMON_MCG_GET_QPLIST_PTR(mcg)					\
109 	((hermon_hw_mcg_qp_list_t *)((uintptr_t)(mcg) +			\
110 	sizeof (hermon_hw_mcg_t)))
111 
112 /*
113  * The following defines specify the characteristics of the Hermon multicast
114  * group hash table.  The HERMON_NUM_MCG_HASH_SHIFT defines the size of the
115  * hash table (as a power-of-2), which is set to 16 by default.  This value
116  * is controllable through the "hermon_log_num_mcg_hash" configuration variable,
117  * but serious consideration should be taken before changing this value.  Note:
118  * its appropriate size should be a function of the entire table size (as
119  * defined by "hermon_log_num_mcg" and HERMON_NUM_MCG_SHIFT above).
120  */
121 #define	HERMON_NUM_MCG_HASH_SHIFT	0x4
122 
123 /*
124  * The following defines are used by the multicast routines to determine
125  * if a given "multicast GID" is valid or not (see hermon_mcg_is_mgid_valid
126  * for more details.  These values are pulled from the IBA specification,
127  * rev. 1.1
128  */
129 #define	HERMON_MCG_TOPBITS_SHIFT	56
130 #define	HERMON_MCG_TOPBITS_MASK		0xFF
131 #define	HERMON_MCG_TOPBITS		0xFF
132 
133 #define	HERMON_MCG_FLAGS_SHIFT		52
134 #define	HERMON_MCG_FLAGS_MASK		0xF
135 #define	HERMON_MCG_FLAGS_PERM		0x0
136 #define	HERMON_MCG_FLAGS_NONPERM	0x1
137 
138 #define	HERMON_MCG_SCOPE_SHIFT		48
139 #define	HERMON_MCG_SCOPE_MASK		0xF
140 #define	HERMON_MCG_SCOPE_LINKLOC	0x2
141 #define	HERMON_MCG_SCOPE_SITELOC	0x5
142 #define	HERMON_MCG_SCOPE_ORGLOC		0x8
143 #define	HERMON_MCG_SCOPE_GLOBAL		0xE
144 
145 
146 /*
147  * The following defines specify the default number of Protection Domains (PD).
148  * By default the maximum number of protection domains is set to 64K.  This
149  * value is controllable through the "hermon_log_num_pd" configuration variable.
150  */
151 #define	HERMON_NUM_PD_SHIFT		0x10
152 
153 /*
154  * The following defines specify the default number of Partition Keys (PKey)
155  * per port.  By default the maximum number of PKeys is set to 32 per port, for
156  * a total of 64 (assuming two ports) .  This value is controllable through the
157  * "hermon_log_max_pkeytbl" configuration variable.
158  */
159 #define	HERMON_NUM_PKEYTBL_SHIFT		0x5
160 #define	HERMON_NUM_PKEYTBL		(1 << HERMON_NUM_PKEYTBL_SHIFT)
161 
162 /*
163  * The following defines specify the default number of SGIDs per port.  By
164  * default the maximum number of GIDS per port is set to 16.  This value
165  * is controllable through the "hermon_log_max_gidtbl" configuration variable.
166  */
167 #define	HERMON_NUM_GIDTBL_SHIFT		0x4
168 #define	HERMON_NUM_GIDTBL		(1 << HERMON_NUM_GIDTBL_SHIFT)
169 
170 /*
171  * Below is a define which is the default number of UAR pages.  By default, the
172  * maximum number of UAR pages is set to 1024 for hermon.  Note that
173  * BlueFlame (if enabled) will  take 1/2 the space behind BAR1 (the UAR BAR)
174  * and therefore we must limit this even further.  This value is controllable
175  * through the "hermon_log_num_uar" configuration variable. NOTE: This value
176  * should not be set larger than 15 (0xF) because the UAR index number is
177  * used as part of the minor number calculation (see hermon_open() for details)
178  * and the minor numbers should not be larger than eighteen bits (i.e. 15 bits
179  * of UAR index, 3 bits of driver instance number).  This is especially true
180  * for 32-bit kernels.
181  */
182 #define	HERMON_NUM_UAR_SHIFT		0xA
183 
184 /*
185  * A DoorBell record (DBr) will be handled uniquely.  They are not in ICM now,
186  * so they don't need the mapping.  And they just need to be accessible to the
187  * HCA as an address, so we don't need to register the memory.  AND, since
188  * user level (uDAPL, OPEN verbs) won't ever do the unmapping of them we don't
189  * really need to worry about that either.  And the DBrs will have to live in
190  * user mappable memory.  So, we can shortcut a lot of things given these
191  * assumptions.
192  *
193  * Other facts:  the DBrs for Hermon are only two per qp - one for the Receive
194  * side (RQ or SRQ) and one for the CQ.  If a QP is associated with an SRQ, we
195  * only need the ONE for the SRQ.  Also, although the RQ/SRQ DBr is only 4-bytes
196  * while the CQ DBr is 8-bytes, all DBrs will be 8-bytes (see the union below).
197  * Though it may lead to minor wastage, it also means that reuse is easier since
198  * any DBr can be used for either, and we don't have to play allocation games.
199  *
200  * The state structure will hold the pointer to the start of a list of struct
201  * hermon_dbr_info_s, each one containing the necessary information to manage
202  * a page of DBr's.
203  */
204 
205 typedef uint64_t hermon_dbr_t;
206 
207 typedef struct hermon_dbr_info_s {
208 	struct hermon_dbr_info_s *dbr_link;
209 	hermon_dbr_t		*dbr_page;	/* virtual addr of page */
210 	uint64_t		dbr_paddr;	/* physical addr of page */
211 	ddi_acc_handle_t	dbr_acchdl;
212 	ddi_dma_handle_t	dbr_dmahdl;
213 	uint32_t		dbr_nfree;	/* #free DBrs in this page */
214 	uint32_t		dbr_firstfree;	/* idx of first free DBr */
215 } hermon_dbr_info_t;
216 
217 #define	HERMON_NUM_DBR_PER_PAGE	(PAGESIZE / sizeof (hermon_dbr_t))
218 
219 
220 /*
221  * These defines specify some miscellaneous port-related configuration
222  * information.  Specifically, HERMON_MAX_MTU is used to define the maximum
223  * MTU supported for each Hermon port, HERMON_MAX_PORT_WIDTH is used to define
224  * the maximum supported port width, and the HERMON_MAX_VLCAP define is used
225  * to specify the maximum number of VLs supported, excluding VL15.  Both
226  * of these values are controllable and get be set using the "hermon_max_mtu"
227  * and "hermon_max_vlcap" configuration variables.  Note: as with many of the
228  * configurable variables, caution should be exercised when changing these
229  * values.  These values, specifically, should not be set any larger than
230  * they are defined here as these are set to the current Hermon device
231  * maximums.
232  *
233  * Note that:  with Hermon, these capabilities that were formerly retrieved
234  * 	as part of QUERY_DEV_LIM/CAP must now be retrieved with QUERY_PORT.
235  *	The init sequence will have to be altered vis-a-vis the older HCAs to
236  *	accommodate this change.
237  *
238  *	Also, the maximums will be changed here for now.
239  */
240 #define	HERMON_MAX_MTU		0x5 /* was 0x4, 2048 but moved to 4096 */
241 #define	HERMON_MAX_PORT_WIDTH	0x7 /* was 0x3 (1x/4x) but now 1/4/8x */
242 #define	HERMON_MAX_VLCAP	0x8 /* remain the same for now */
243 
244 /*
245  * These last defines are used by the statistics counting routines (kstats)
246  * for initialization of the structures associated with the IB statistics
247  * access routines.  The HERMON_CNTR_MASK and HERMON_CNTR_SIZE defines are
248  * used to divide the "pcr" register into two 32-bit counters (one for "pic0"
249  * and the other for "pic1")
250  */
251 #define	HERMON_CNTR_MASK		0xFFFFFFFF
252 #define	HERMON_CNTR_SIZE		32
253 #define	HERMON_CNTR_NUMENTRIES	17
254 
255 
256 
257 #define	HERMON_QUEUE_LOCATION_NORMAL	0x1
258 #define	HERMON_QUEUE_LOCATION_USERLAND	0x2
259 
260 /*
261  * Minimum number of ticks to delay between successive polls of the CQ in
262  * VTS ioctl loopback test
263  */
264 #define	HERMON_VTS_LOOPBACK_MIN_WAIT_DUR	50
265 
266 /*
267  * UAR software table, layout and associated structures
268  */
269 
270 /*
271  * Doorbell record table bitmap macros
272  */
273 #define	HERMON_IND_BYTE(ind)		((ind) >> 3)
274 #define	HERMON_IND_BIT(ind)		(1 << ((ind) & 0x7))
275 
276 #define	HERMON_BMAP_BIT_SET(bmap, ind)	\
277 	((bmap)[HERMON_IND_BYTE(ind)] |= HERMON_IND_BIT(ind))
278 #define	HERMON_BMAP_BIT_CLR(bmap, ind)	\
279 	((bmap)[HERMON_IND_BYTE(ind)] &= ~HERMON_IND_BIT(ind))
280 #define	HERMON_BMAP_BIT_ISSET(bmap, ind)	\
281 	((bmap)[HERMON_IND_BYTE(ind)] & HERMON_IND_BIT(ind))
282 
283 
284 /*
285  * User doorbell record page tracking
286  */
287 typedef struct hermon_udbr_page_s hermon_udbr_page_t;
288 
289 struct hermon_udbr_page_s {
290 	hermon_udbr_page_t	*upg_link;
291 	uint_t			upg_index;
292 	uint_t			upg_nfree;
293 	uint64_t		*upg_free;
294 	caddr_t			upg_kvaddr;
295 	struct buf		*upg_buf;
296 	ddi_umem_cookie_t	upg_umemcookie;
297 	ddi_dma_handle_t	upg_dmahdl;
298 	ddi_dma_cookie_t 	upg_dmacookie;
299 };
300 
301 typedef struct hermon_udbr_mgmt_s hermon_user_dbr_t;
302 
303 struct hermon_udbr_mgmt_s {
304 	hermon_user_dbr_t	*udbr_link;
305 	uint_t			udbr_index;	/* same as uarpg */
306 	hermon_udbr_page_t	*udbr_pagep;
307 };
308 
309 
310 /*
311  * doorbell tracking end
312  */
313 
314 /*
315  * The hermon_sw_ah_s structure is also referred to using the "hermon_ahhdl_t"
316  * typedef (see hermon_typedef.h).  It encodes all the information necessary
317  * to track the various resources needed to allocate, query, modify, and
318  * free an address handle.
319  *
320  * In specific, it has a lock to ensure single-threaded access. It stores a
321  * pointer to the associated PD handle, and also contains a copy of the
322  * GUID stored into the address handle.  The reason for this extra copy of
323  * the GUID info has to do with Hermon PRM compliance and is fully explained
324  * in hermon_misc.c
325  *
326  * To serve in it's primary function, it also contains a UDAV, which contains
327  * all of the data associated with the UD address vector that is being
328  * utilized by the holder of the address handle. The hardware-specific format
329  * of the UDAV is defined in the hermon_hw.h file.
330  *
331  * It also has the always necessary backpointer to the resource for the AH
332  * handle structure itself.
333  */
334 struct hermon_sw_ah_s {
335 	kmutex_t	ah_lock;
336 	hermon_pdhdl_t	ah_pdhdl;
337 	hermon_hw_udav_t *ah_udav;
338 	hermon_rsrc_t	*ah_rsrcp;
339 	uint64_t	ah_save_guid;
340 };
341 _NOTE(READ_ONLY_DATA(hermon_sw_ah_s::ah_udav))
342 _NOTE(MUTEX_PROTECTS_DATA(hermon_sw_ah_s::ah_lock,
343     hermon_sw_ah_s::ah_pdhdl
344     hermon_sw_ah_s::ah_rsrcp
345     hermon_sw_ah_s::ah_save_guid))
346 
347 /*
348  * The hermon_sw_mcg_list_s structure is also referred to using the
349  * "hermon_mcghdl_t" typedef (see hermon_typedef.h).  It encodes all the
350  * information necessary to track the various resources needed to for attaching
351  * and detaching QP from multicast groups.
352  *
353  * The Hermon driver keeps an array of these and uses them as a shadow for
354  * the real HW-based MCG table.  They hold all the necessary information
355  * to track the resources and to allow fast access to the MCG table.  First,
356  * it had a 128-bit multicast GID (stored in "mcg_mgid_h" and "mcg_mgid_l".
357  * next if has a field to indicate the index of the next hermon_mcghdl_t in
358  * the current hash chain (zero is the end of the chain).  Note: this very
359  * closely mimics what the hardware MCG entry has. Then it has a field to
360  * indicate how many QP are currently attached to the given MCG.  And, lastly,
361  * it has the obligatory backpointer to the resource for the MCH handle
362  * structure itself.
363  */
364 struct hermon_sw_mcg_list_s {
365 	uint64_t	mcg_mgid_h;
366 	uint64_t	mcg_mgid_l;
367 	uint_t		mcg_next_indx;
368 	uint_t		mcg_num_qps;
369 	hermon_rsrc_t	*mcg_rsrcp;
370 };
371 
372 /*
373  * The hermon_sw_pd_s structure is also referred to using the "hermon_pdhdl_t"
374  * typedef (see hermon_typedef.h).  It encodes all the information necessary
375  * to track the various resources needed to allocate and free protection
376  * domains
377  *
378  * Specifically, it has reference count and a lock to ensure single threaded
379  * access to it.  It has a field for the protection domain number ("pd_pdnum").
380  * And it also has the obligatory backpointer to the resource for the PD
381  * handle structure itself.
382  */
383 struct hermon_sw_pd_s {
384 	kmutex_t	pd_lock;
385 	uint32_t	pd_pdnum;
386 	uint32_t	pd_refcnt;
387 	hermon_rsrc_t	*pd_rsrcp;
388 };
389 _NOTE(READ_ONLY_DATA(hermon_sw_pd_s::pd_pdnum
390     hermon_sw_pd_s::pd_rsrcp))
391 _NOTE(MUTEX_PROTECTS_DATA(hermon_sw_pd_s::pd_lock,
392     hermon_sw_pd_s::pd_refcnt))
393 
394 /*
395  * The hermon_qalloc_info_s structure is also referred to using the
396  * "hermon_qalloc_info_t" typedef (see hermon_typedef.h).  It holds all the
397  * information necessary to track the resources for each of the various Hermon
398  * queue types (i.e. Event Queue, Completion Queue, Work Queue).
399  *
400  * Specifically, it has the size, alignment restrictions, and location (in DDR
401  * or in system memory).  And depending on the location, it also has the
402  * ddi_dma_handle_t, ddi_acc_handle_t, and pointers used for reading/writing to
403  * the queue's memory.
404  */
405 struct hermon_qalloc_info_s {
406 	uint64_t		qa_size;
407 	uint64_t		qa_alloc_align;
408 	uint64_t		qa_bind_align;
409 	uint32_t		*qa_buf_real;
410 	uint32_t		*qa_buf_aligned;
411 	uint64_t		qa_buf_realsz;
412 	uint_t			qa_pgoffs;
413 	uint_t			qa_location;
414 	ddi_dma_handle_t	qa_dmahdl;
415 	ddi_acc_handle_t	qa_acchdl;
416 	ddi_umem_cookie_t	qa_umemcookie;
417 };
418 
419 /*
420  * The hermon_ks_mask_t structure encodes all the information necessary for
421  * the individual kstat entries.  The "ks_reg_offset" field contains the
422  * hardware offset for the corresponding counter, and "ks_reg_shift" and
423  * "ks_reg_mask" contain shift and mask registers used by the access routines.
424  * Also the "ks_old_pic0" and "ks_old_pic1" fields contain the most recently
425  * read value for the corresponding port ("pic").  Note:  An array of these
426  * structures is part of the "hermon_ks_info_t" structure below.
427  */
428 typedef struct hermon_ks_mask_s {
429 	char		*ks_evt_name;
430 	uint32_t	ks_old_pic0;
431 	uint32_t	ks_old_pic1;
432 } hermon_ks_mask_t;
433 
434 /*
435  * Index into the named data components of 64 bit "perf_counters" kstat.
436  */
437 enum {
438 	HERMON_PERFCNTR64_ENABLE_IDX = 0,
439 	HERMON_PERFCNTR64_XMIT_DATA_IDX,
440 	HERMON_PERFCNTR64_RECV_DATA_IDX,
441 	HERMON_PERFCNTR64_XMIT_PKTS_IDX,
442 	HERMON_PERFCNTR64_RECV_PKTS_IDX,
443 	HERMON_PERFCNTR64_NUM_COUNTERS
444 };
445 
446 /*
447  * Data associated with the 64 bit "perf_counters" kstat. One for each port.
448  */
449 typedef struct hermon_perfcntr64_ks_info_s {
450 	struct kstat	*hki64_ksp;
451 	int		hki64_ext_port_counters_supported;
452 	int		hki64_enabled;
453 	uint64_t	hki64_counters[HERMON_PERFCNTR64_NUM_COUNTERS];
454 	uint32_t	hki64_last_read[HERMON_PERFCNTR64_NUM_COUNTERS];
455 	uint_t		hki64_port_num;
456 	hermon_state_t	*hki64_state;
457 } hermon_perfcntr64_ks_info_t;
458 
459 /*
460  * The hermon_ks_info_t structure stores all the information necessary for
461  * tracking the resources associated with each of the various kstats.  In
462  * addition to containing pointers to each of the counter and pic kstats,
463  * this structure also contains "hki_pcr" which is the control register that
464  * determines which of the countable entries (from the "hki_ib_perfcnt[]"
465  * array) is being currently accessed.
466  */
467 typedef struct hermon_ks_info_s {
468 	struct kstat	*hki_cntr_ksp;
469 	struct kstat	*hki_picN_ksp[HERMON_MAX_PORTS];
470 	uint64_t	hki_pcr;
471 	uint64_t	hki_pic0;
472 	uint64_t	hki_pic1;
473 	hermon_ks_mask_t	hki_ib_perfcnt[HERMON_CNTR_NUMENTRIES];
474 	kt_did_t	hki_perfcntr64_thread_id;
475 	kmutex_t	hki_perfcntr64_lock;
476 	kcondvar_t	hki_perfcntr64_cv;
477 	uint_t		hki_perfcntr64_flags;	/* see below */
478 	hermon_perfcntr64_ks_info_t	hki_perfcntr64[HERMON_MAX_PORTS];
479 } hermon_ks_info_t;
480 
481 /* hki_perfcntr64_flags */
482 #define	HERMON_PERFCNTR64_THREAD_CREATED	0x0001
483 #define	HERMON_PERFCNTR64_THREAD_EXIT		0x0002
484 
485 /*
486  * The hermon_ports_ioctl32_t, hermon_loopback_ioctl32_t, and
487  * hermon_flash_ioctl32_s structures are used internally by the Hermon
488  * driver to accomodate 32-bit applications which need to access the
489  * Hermon ioctls.  They are 32-bit versions of externally available
490  * structures defined in hermon_ioctl.h
491  */
492 typedef struct hermon_ports_ioctl32_s {
493 	uint_t			ap_revision;
494 	caddr32_t		ap_ports;
495 	uint8_t			ap_num_ports;
496 } hermon_ports_ioctl32_t;
497 
498 typedef struct hermon_loopback_ioctl32_s {
499 	uint_t			alb_revision;
500 	caddr32_t		alb_send_buf;
501 	caddr32_t		alb_fail_buf;
502 	uint_t			alb_buf_sz;
503 	uint_t			alb_num_iter;
504 	uint_t			alb_pass_done;
505 	uint_t			alb_timeout;
506 	hermon_loopback_error_t	alb_error_type;
507 	uint8_t			alb_port_num;
508 	uint8_t			alb_num_retry;
509 } hermon_loopback_ioctl32_t;
510 
511 typedef struct hermon_flash_ioctl32_s {
512 	uint32_t	af_type;
513 	caddr32_t	af_sector;
514 	uint32_t	af_sector_num;
515 	uint32_t	af_addr;
516 	uint32_t	af_quadlet;
517 	uint8_t		af_byte;
518 } hermon_flash_ioctl32_t;
519 
520 /*
521  * The hermon_loopback_comm_t and hermon_loopback_state_t structures below
522  * are used to store all of the relevant state information needed to keep
523  * track of a single VTS ioctl loopback test run.
524  */
525 typedef struct hermon_loopback_comm_s {
526 	uint8_t			*hlc_buf;
527 	size_t			hlc_buf_sz;
528 	ibt_mr_desc_t		hlc_mrdesc;
529 
530 	hermon_mrhdl_t		hlc_mrhdl;
531 	hermon_cqhdl_t		hlc_cqhdl[2];
532 	hermon_qphdl_t		hlc_qp_hdl;
533 
534 	ibt_mr_attr_t		hlc_memattr;
535 	uint_t			hlc_qp_num;
536 	ibt_cq_attr_t		hlc_cq_attr;
537 	ibt_qp_alloc_attr_t	hlc_qp_attr;
538 	ibt_chan_sizes_t	hlc_chan_sizes;
539 	ibt_qp_info_t		hlc_qp_info;
540 	ibt_queue_sizes_t	hlc_queue_sizes;
541 	ibt_send_wr_t		hlc_wr;
542 	ibt_wr_ds_t		hlc_sgl;
543 	ibt_wc_t		hlc_wc;
544 	uint_t			hlc_num_polled;
545 	ibt_status_t		hlc_status;
546 	int			hlc_complete;
547 	int			hlc_wrid;
548 } hermon_loopback_comm_t;
549 
550 typedef struct hermon_loopback_state_s {
551 	uint8_t			hls_port;
552 	uint_t			hls_lid;
553 	uint8_t			hls_retry;
554 	hermon_state_t		*hls_state;
555 	ibc_hca_hdl_t		hls_hca_hdl;
556 	hermon_pdhdl_t		hls_pd_hdl;
557 	hermon_loopback_comm_t	hls_tx;
558 	hermon_loopback_comm_t	hls_rx;
559 	ibt_status_t		hls_status;
560 	int			hls_err;
561 	int			hls_pkey_ix;
562 	int			hls_timeout;
563 } hermon_loopback_state_t;
564 
565 /*
566  * Mellanox FMR
567  */
568 typedef struct hermon_fmr_list_s {
569 	avl_node_t			fmr_avlnode;
570 	struct hermon_fmr_list_s		*fmr_next;
571 
572 	hermon_mrhdl_t			fmr;
573 	ibt_pmr_desc_t			fmr_desc;
574 	hermon_fmrhdl_t			fmr_pool;
575 	uint_t				fmr_refcnt;
576 	uint_t				fmr_remaps;
577 	uint_t				fmr_in_cache;
578 } hermon_fmr_list_t;
579 
580 struct hermon_sw_fmr_s {
581 	hermon_state_t			*fmr_state;
582 
583 	kmutex_t			fmr_lock;
584 	ddi_taskq_t			*fmr_taskq;
585 
586 	ibt_fmr_flush_handler_t		fmr_flush_function;
587 	void				*fmr_flush_arg;
588 
589 	int				fmr_pool_size;
590 	int				fmr_max_pages;
591 	int				fmr_page_sz;
592 	int				fmr_dirty_watermark;
593 	int				fmr_dirty_len;
594 	int				fmr_flags;
595 
596 	hermon_fmr_list_t		*fmr_free_list;
597 	hermon_fmr_list_t		*fmr_dirty_list;
598 
599 	int				fmr_cache;
600 	avl_tree_t			fmr_cache_avl;
601 	kmutex_t			fmr_cachelock;
602 };
603 _NOTE(MUTEX_PROTECTS_DATA(hermon_sw_fmr_s::fmr_lock,
604     hermon_sw_fmr_s::fmr_state
605     hermon_sw_fmr_s::fmr_pool_size
606     hermon_sw_fmr_s::fmr_max_pages
607     hermon_sw_fmr_s::fmr_page_sz
608     hermon_sw_fmr_s::fmr_dirty_watermark
609     hermon_sw_fmr_s::fmr_dirty_len
610     hermon_sw_fmr_s::fmr_flags
611     hermon_sw_fmr_s::fmr_free_list
612     hermon_sw_fmr_s::fmr_dirty_list
613     hermon_sw_fmr_s::fmr_cache))
614 
615 _NOTE(MUTEX_PROTECTS_DATA(hermon_sw_fmr_s::fmr_cachelock,
616     hermon_sw_fmr_s::fmr_cache_avl))
617 
618 #define	HERMON_FMR_MAX_REMAPS		32
619 
620 /* Hermon doorbell record routines */
621 
622 int hermon_dbr_page_alloc(hermon_state_t *state, hermon_dbr_info_t **info);
623 int hermon_dbr_alloc(hermon_state_t *state, uint_t index,
624     ddi_acc_handle_t *acchdl, hermon_dbr_t **vdbr, uint64_t *pdbr,
625     uint64_t *mapoffset);
626 void hermon_dbr_free(hermon_state_t *state, uint_t indx, hermon_dbr_t *record);
627 void hermon_dbr_kern_free(hermon_state_t *state);
628 
629 /* Hermon Fast Memory Registration Routines */
630 int hermon_create_fmr_pool(hermon_state_t *state, hermon_pdhdl_t pdhdl,
631     ibt_fmr_pool_attr_t *params, hermon_fmrhdl_t *fmrhdl);
632 int hermon_destroy_fmr_pool(hermon_state_t *state, hermon_fmrhdl_t fmrhdl);
633 int hermon_flush_fmr_pool(hermon_state_t *state, hermon_fmrhdl_t fmrhdl);
634 int hermon_register_physical_fmr(hermon_state_t *state, hermon_fmrhdl_t fmrhdl,
635     ibt_pmr_attr_t *mem_pattr_p, hermon_mrhdl_t *mrhdl,
636     ibt_pmr_desc_t *mem_desc_p);
637 int hermon_deregister_fmr(hermon_state_t *state, hermon_mrhdl_t mr);
638 
639 
640 /* Hermon Address Handle routines */
641 int hermon_ah_alloc(hermon_state_t *state, hermon_pdhdl_t pd,
642     ibt_adds_vect_t *attr_p, hermon_ahhdl_t *ahhdl, uint_t sleepflag);
643 int hermon_ah_free(hermon_state_t *state, hermon_ahhdl_t *ahhdl,
644     uint_t sleepflag);
645 int hermon_ah_query(hermon_state_t *state, hermon_ahhdl_t ahhdl,
646     hermon_pdhdl_t *pdhdl, ibt_adds_vect_t *attr_p);
647 int hermon_ah_modify(hermon_state_t *state, hermon_ahhdl_t ahhdl,
648     ibt_adds_vect_t *attr_p);
649 
650 /* Hermon Multicast Group routines */
651 int hermon_mcg_attach(hermon_state_t *state, hermon_qphdl_t qphdl, ib_gid_t gid,
652     ib_lid_t lid);
653 int hermon_mcg_detach(hermon_state_t *state, hermon_qphdl_t qphdl, ib_gid_t gid,
654     ib_lid_t lid);
655 
656 /* Hermon Protection Domain routines */
657 int hermon_pd_alloc(hermon_state_t *state, hermon_pdhdl_t *pdhdl,
658     uint_t sleepflag);
659 int hermon_pd_free(hermon_state_t *state, hermon_pdhdl_t *pdhdl);
660 void hermon_pd_refcnt_inc(hermon_pdhdl_t pd);
661 void hermon_pd_refcnt_dec(hermon_pdhdl_t pd);
662 
663 /* Hermon port-related routines */
664 int hermon_port_query(hermon_state_t *state, uint_t port,
665     ibt_hca_portinfo_t *pi);
666 int hermon_port_modify(hermon_state_t *state, uint8_t port,
667     ibt_port_modify_flags_t flags, uint8_t init_type);
668 
669 /* Hermon statistics (kstat) routines */
670 int hermon_kstat_init(hermon_state_t *state);
671 void hermon_kstat_fini(hermon_state_t *state);
672 
673 /* Miscellaneous routines */
674 int hermon_set_addr_path(hermon_state_t *state, ibt_adds_vect_t *av,
675     hermon_hw_addr_path_t *path, uint_t type);
676 void hermon_get_addr_path(hermon_state_t *state, hermon_hw_addr_path_t *path,
677     ibt_adds_vect_t *av, uint_t type);
678 int hermon_portnum_is_valid(hermon_state_t *state, uint_t portnum);
679 int hermon_pkeyindex_is_valid(hermon_state_t *state, uint_t pkeyindx);
680 int hermon_queue_alloc(hermon_state_t *state, hermon_qalloc_info_t *qa_info,
681     uint_t sleepflag);
682 void hermon_queue_free(hermon_qalloc_info_t *qa_info);
683 int hermon_get_dma_cookies(hermon_state_t *state, ibt_phys_buf_t *paddr_list_p,
684     ibt_va_attr_t *va_attrs, uint_t list_len, uint_t *cookiecnt,
685     ibc_ma_hdl_t *ibc_ma_hdl_p);
686 int hermon_split_dma_cookies(hermon_state_t *state,
687     ibt_phys_buf_t *paddr_list_p, ib_memlen_t *paddr_offset_p,
688     uint_t list_len, uint_t *cookiecnt, uint_t pagesize);
689 int hermon_dma_cookie_shift(ibt_phys_buf_t *paddr_list, int start, int end,
690     int cookiecnt, int num_shift);
691 int hermon_free_dma_cookies(ibc_ma_hdl_t ibc_ma_hdl);
692 int hermon_log2(long x);
693 
694 
695 #ifdef __cplusplus
696 }
697 #endif
698 
699 #endif	/* _SYS_IB_ADAPTERS_HERMON_MISC_H */
700