xref: /illumos-gate/usr/src/uts/common/io/usb/hcd/uhci/uhci.c (revision 0bb073995ac5a95bd35f2dd790df1ea3d8c2d507)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 
27 /*
28  * Universal Host Controller Driver (UHCI)
29  *
30  * The UHCI driver is a driver which interfaces to the Universal
31  * Serial Bus Architecture (USBA) and the Host Controller (HC). The interface to
32  * the Host Controller is defined by the Universal Host Controller Interface.
33  * This file contains code for auto-configuration entry points and interrupt
34  * handling.
35  */
36 #include <sys/usb/hcd/uhci/uhcid.h>
37 #include <sys/usb/hcd/uhci/uhcihub.h>
38 #include <sys/usb/hcd/uhci/uhciutil.h>
39 
40 /*
41  * Prototype Declarations for cb_ops and dev_ops
42  */
43 static	int uhci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
44 static	int uhci_add_intrs(uhci_state_t *uhcip, int	intr_type);
45 static	int uhci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
46 static void uhci_rem_intrs(uhci_state_t	*uhcip);
47 static	int uhci_open(dev_t *devp, int flags, int otyp, cred_t *credp);
48 static	int uhci_close(dev_t dev, int flag, int otyp, cred_t *credp);
49 static	int uhci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode,
50 		cred_t *credp, int *rvalp);
51 static	int uhci_reset(dev_info_t *dip, ddi_reset_cmd_t cmd);
52 static	int uhci_quiesce(dev_info_t *dip);
53 static	int uhci_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg,
54 		void **result);
55 
56 /* extern */
57 int usba_hubdi_root_hub_power(dev_info_t *dip, int comp, int level);
58 
59 static struct cb_ops uhci_cb_ops = {
60 	uhci_open,			/* Open */
61 	uhci_close,			/* Close */
62 	nodev,				/* Strategy */
63 	nodev,				/* Print */
64 	nodev,				/* Dump */
65 	nodev,				/* Read */
66 	nodev,				/* Write */
67 	uhci_ioctl,			/* Ioctl */
68 	nodev,				/* Devmap */
69 	nodev,				/* Mmap */
70 	nodev,				/* Segmap */
71 	nochpoll,			/* Poll */
72 	ddi_prop_op,			/* cb_prop_op */
73 	NULL,				/* Streamtab */
74 	D_MP				/* Driver compatibility flag */
75 };
76 
77 static struct dev_ops uhci_ops = {
78 	DEVO_REV,			/* Devo_rev */
79 	0,				/* Refcnt */
80 	uhci_info,			/* Info */
81 	nulldev,			/* Identify */
82 	nulldev,			/* Probe */
83 	uhci_attach,			/* Attach */
84 	uhci_detach,			/* Detach */
85 	uhci_reset,			/* Reset */
86 	&uhci_cb_ops,			/* Driver operations */
87 	&usba_hubdi_busops,		/* Bus operations */
88 	usba_hubdi_root_hub_power,	/* Power */
89 	uhci_quiesce			/* quiesce */
90 };
91 
92 static struct modldrv modldrv = {
93 	&mod_driverops,		/* Type of module. This one is a driver */
94 	"USB UHCI Controller Driver",	/* Name of the module. */
95 	&uhci_ops,		/* Driver ops */
96 };
97 
98 static struct modlinkage modlinkage = {
99 	MODREV_1, (void *)&modldrv, NULL
100 };
101 
102 /*
103  *  Globals
104  */
105 void		*uhci_statep;
106 uint_t		uhci_errlevel = USB_LOG_L2;
107 uint_t		uhci_errmask = PRINT_MASK_ALL;
108 uint_t		uhci_instance_debug = (uint_t)-1;
109 
110 uint_t		uhci_td_pool_size = 256;			/* Num TDs */
111 uint_t		uhci_qh_pool_size = 130;			/* Num QHs */
112 ushort_t	uhci_tree_bottom_nodes[NUM_FRAME_LST_ENTRIES];
113 
114 
115 /*
116  * UHCI MSI tunable:
117  *
118  * By default MSI is enabled on all supported platforms.
119  */
120 boolean_t uhci_enable_msi = B_TRUE;
121 
122 /*
123  * tunable, delay during attach in seconds
124  */
125 int		uhci_attach_wait = 0;
126 
127 /* function prototypes */
128 static void	uhci_handle_intr_td_errors(uhci_state_t *uhcip, uhci_td_t *td,
129 			uhci_trans_wrapper_t *tw, uhci_pipe_private_t *pp);
130 static void	uhci_handle_one_xfer_completion(uhci_state_t *uhcip,
131 			usb_cr_t usb_err, uhci_td_t *td);
132 static uint_t	uhci_intr(caddr_t arg1, caddr_t arg2);
133 static int	uhci_cleanup(uhci_state_t *uhcip);
134 static int	uhci_cpr_suspend(uhci_state_t *uhcip);
135 static int	uhci_cpr_resume(uhci_state_t *uhcip);
136 
137 
138 int
139 _init(void)
140 {
141 	int error;
142 	ushort_t i, j, k, *temp, num_of_nodes;
143 
144 	/* Initialize the soft state structures */
145 	if ((error = ddi_soft_state_init(&uhci_statep, sizeof (uhci_state_t),
146 	    UHCI_MAX_INSTS)) != 0) {
147 
148 		return (error);
149 	}
150 
151 	/* Install the loadable module */
152 	if ((error = mod_install(&modlinkage)) != 0) {
153 		ddi_soft_state_fini(&uhci_statep);
154 
155 		return (error);
156 	}
157 
158 	/*
159 	 *  Build the tree bottom shared by all instances
160 	 */
161 	temp = kmem_zalloc(NUM_FRAME_LST_ENTRIES * 2, KM_SLEEP);
162 
163 	num_of_nodes = 1;
164 	for (i = 0; i < log_2(NUM_FRAME_LST_ENTRIES); i++) {
165 		for (j = 0, k = 0; k < num_of_nodes; k++, j++) {
166 			uhci_tree_bottom_nodes[j++] = temp[k];
167 			uhci_tree_bottom_nodes[j]   = temp[k] + pow_2(i);
168 		}
169 
170 		num_of_nodes *= 2;
171 		for (k = 0; k < num_of_nodes; k++)
172 			temp[k] = uhci_tree_bottom_nodes[k];
173 
174 	}
175 	kmem_free(temp, (NUM_FRAME_LST_ENTRIES*2));
176 
177 
178 	return (error);
179 }
180 
181 
182 int
183 _info(struct modinfo *modinfop)
184 {
185 	return (mod_info(&modlinkage, modinfop));
186 }
187 
188 
189 int
190 _fini(void)
191 {
192 	int error;
193 
194 	error = mod_remove(&modlinkage);
195 
196 	if (error == 0) {
197 		/* Release per module resources */
198 		ddi_soft_state_fini(&uhci_statep);
199 	}
200 
201 	return (error);
202 }
203 
204 /*
205  * The following simulated polling is for debugging purposes only.
206  * It is activated on x86 by setting usb-polling=true in GRUB or uhci.conf.
207  */
208 static int
209 uhci_is_polled(dev_info_t *dip)
210 {
211 	int ret;
212 	char *propval;
213 
214 	if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
215 	    "usb-polling", &propval) != DDI_SUCCESS)
216 
217 		return (0);
218 
219 	ret = (strcmp(propval, "true") == 0);
220 	ddi_prop_free(propval);
221 
222 	return (ret);
223 }
224 
225 static void
226 uhci_poll_intr(void *arg)
227 {
228 	/* poll every msec */
229 	for (;;) {
230 		(void) uhci_intr(arg, NULL);
231 		delay(drv_usectohz(1000));
232 	}
233 }
234 
235 /*
236  * Host Controller Driver (HCD) Auto configuration entry points
237  */
238 
239 /*
240  * Function Name  :  uhci_attach:
241  * Description	  :  Attach entry point - called by the Kernel.
242  *		     Allocates of per controller data structure.
243  *		     Initializes the controller.
244  * Output	  :  DDI_SUCCESS / DDI_FAILURE
245  */
246 static int
247 uhci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
248 {
249 	int				instance, polled;
250 	int				i, intr_types;
251 	uhci_state_t			*uhcip = NULL;
252 	usba_hcdi_register_args_t	hcdi_args;
253 
254 	USB_DPRINTF_L4(PRINT_MASK_ATTA, NULL, "uhci_attach:");
255 
256 	switch (cmd) {
257 	case DDI_ATTACH:
258 		break;
259 	case DDI_RESUME:
260 		uhcip = uhci_obtain_state(dip);
261 
262 		return (uhci_cpr_resume(uhcip));
263 	default:
264 
265 		return (DDI_FAILURE);
266 	}
267 
268 	/* Get the instance and create soft state */
269 	instance = ddi_get_instance(dip);
270 
271 	/* Allocate the soft state structure for this instance of the driver */
272 	if (ddi_soft_state_zalloc(uhci_statep, instance) != 0) {
273 
274 		return (DDI_FAILURE);
275 	}
276 
277 	if ((uhcip = ddi_get_soft_state(uhci_statep, instance)) == NULL) {
278 
279 		return (DDI_FAILURE);
280 	}
281 
282 	uhcip->uhci_log_hdl = usb_alloc_log_hdl(dip, "uhci", &uhci_errlevel,
283 	    &uhci_errmask, &uhci_instance_debug, 0);
284 
285 	/* Set host controller soft state to initialization */
286 	uhcip->uhci_hc_soft_state = UHCI_CTLR_INIT_STATE;
287 
288 	/* Save the dip and instance */
289 	uhcip->uhci_dip		= dip;
290 	uhcip->uhci_instance	= instance;
291 
292 	polled = uhci_is_polled(dip);
293 	if (polled)
294 
295 		goto skip_intr;
296 
297 	/* Get supported interrupt types */
298 	if (ddi_intr_get_supported_types(uhcip->uhci_dip,
299 	    &intr_types) != DDI_SUCCESS) {
300 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
301 		    "uhci_attach: ddi_intr_get_supported_types failed");
302 
303 		usb_free_log_hdl(uhcip->uhci_log_hdl);
304 		ddi_soft_state_free(uhci_statep, instance);
305 
306 		return (DDI_FAILURE);
307 	}
308 
309 	USB_DPRINTF_L3(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
310 	    "uhci_attach: supported interrupt types 0x%x", intr_types);
311 
312 	if ((intr_types & DDI_INTR_TYPE_MSI) && uhci_enable_msi) {
313 		if (uhci_add_intrs(uhcip, DDI_INTR_TYPE_MSI)
314 		    != DDI_SUCCESS) {
315 			USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
316 			    "uhci_attach: MSI registration failed, "
317 			    "trying FIXED interrupt \n");
318 		} else {
319 			USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
320 			    "uhci_attach: Using MSI interrupt type\n");
321 
322 			uhcip->uhci_intr_type = DDI_INTR_TYPE_MSI;
323 		}
324 	}
325 
326 	if (!(uhcip->uhci_htable) && (intr_types & DDI_INTR_TYPE_FIXED)) {
327 		if (uhci_add_intrs(uhcip, DDI_INTR_TYPE_FIXED)
328 		    != DDI_SUCCESS) {
329 			USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
330 			    "uhci_attach: FIXED interrupt registration "
331 			    "failed\n");
332 
333 			usb_free_log_hdl(uhcip->uhci_log_hdl);
334 			ddi_soft_state_free(uhci_statep, instance);
335 
336 			return (DDI_FAILURE);
337 		}
338 
339 		USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
340 		    "uhci_attach: Using FIXED interrupt type\n");
341 
342 		uhcip->uhci_intr_type = DDI_INTR_TYPE_FIXED;
343 	}
344 
345 skip_intr:
346 	/* Semaphore to serialize opens and closes */
347 	sema_init(&uhcip->uhci_ocsem, 1, NULL, SEMA_DRIVER, NULL);
348 
349 	/* Create prototype condition variable */
350 	cv_init(&uhcip->uhci_cv_SOF, NULL, CV_DRIVER, NULL);
351 
352 	/* Initialize the DMA attributes */
353 	uhci_set_dma_attributes(uhcip);
354 
355 	/* Initialize the kstat structures */
356 	uhci_create_stats(uhcip);
357 
358 	/* Create the td and ed pools */
359 	if (uhci_allocate_pools(uhcip) != USB_SUCCESS) {
360 
361 		goto fail;
362 	}
363 
364 	/* Map the registers */
365 	if (uhci_map_regs(uhcip) != USB_SUCCESS) {
366 
367 		goto fail;
368 	}
369 
370 	/* Enable all interrupts */
371 	if (polled) {
372 		extern pri_t maxclsyspri;
373 
374 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
375 		    "uhci_attach: running in simulated polled mode.");
376 
377 		/* create thread to poll */
378 		(void) thread_create(NULL, 0, uhci_poll_intr, uhcip, 0, &p0,
379 		    TS_RUN, maxclsyspri);
380 	} else if (uhcip->uhci_intr_cap & DDI_INTR_FLAG_BLOCK) {
381 		/* Call ddi_intr_block_enable() for MSI interrupts */
382 		(void) ddi_intr_block_enable(uhcip->uhci_htable,
383 		    uhcip->uhci_intr_cnt);
384 	} else {
385 		/* Call ddi_intr_enable for MSI or FIXED interrupts */
386 		for (i = 0; i < uhcip->uhci_intr_cnt; i++)
387 			(void) ddi_intr_enable(uhcip->uhci_htable[i]);
388 	}
389 
390 
391 	/* Initialize the controller */
392 	if (uhci_init_ctlr(uhcip) != USB_SUCCESS) {
393 
394 		goto fail;
395 	}
396 
397 	/*
398 	 * At this point, the hardware will be okay.
399 	 * Initialize the usba_hcdi structure
400 	 */
401 	uhcip->uhci_hcdi_ops = uhci_alloc_hcdi_ops(uhcip);
402 
403 	/*
404 	 * Make this HCD instance known to USBA
405 	 * (dma_attr must be passed for USBA busctl's)
406 	 */
407 	hcdi_args.usba_hcdi_register_version = HCDI_REGISTER_VERSION;
408 	hcdi_args.usba_hcdi_register_dip = dip;
409 	hcdi_args.usba_hcdi_register_ops = uhcip->uhci_hcdi_ops;
410 	hcdi_args.usba_hcdi_register_dma_attr = &uhcip->uhci_dma_attr;
411 	hcdi_args.usba_hcdi_register_iblock_cookie =
412 	    (ddi_iblock_cookie_t)(uintptr_t)uhcip->uhci_intr_pri;
413 
414 	if (usba_hcdi_register(&hcdi_args, 0) != USB_SUCCESS) {
415 
416 		goto fail;
417 	}
418 
419 #ifndef __sparc
420 	/*
421 	 * On NCR system,  the driver seen  failure of some commands
422 	 * while booting. This delay mysteriously solved the problem.
423 	 */
424 	delay(drv_usectohz(uhci_attach_wait*1000000));
425 #endif
426 
427 	/*
428 	 * Create another timeout handler to check whether any
429 	 * control/bulk/interrupt commands failed.
430 	 * This gets called every second.
431 	 */
432 	uhcip->uhci_cmd_timeout_id = timeout(uhci_cmd_timeout_hdlr,
433 	    (void *)uhcip, UHCI_ONE_SECOND);
434 
435 	mutex_enter(&uhcip->uhci_int_mutex);
436 
437 	/*
438 	 * Set HcInterruptEnable to enable all interrupts except Root
439 	 * Hub Status change and SOF interrupts.
440 	 */
441 	Set_OpReg16(USBINTR, ENABLE_ALL_INTRS);
442 
443 	/* Test the SOF interrupt */
444 	if (uhci_wait_for_sof(uhcip) != USB_SUCCESS) {
445 		USB_DPRINTF_L0(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
446 		    "No SOF interrupts have been received, this USB UHCI host"
447 		    " controller is unusable");
448 		mutex_exit(&uhcip->uhci_int_mutex);
449 
450 		goto fail;
451 	}
452 
453 	mutex_exit(&uhcip->uhci_int_mutex);
454 
455 	/* This should be the last step which might fail during attaching */
456 	if (uhci_init_root_hub(uhcip) != USB_SUCCESS) {
457 
458 		goto fail;
459 	}
460 
461 	/* Display information in the banner */
462 	ddi_report_dev(dip);
463 
464 	USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
465 	    "uhci_attach successful");
466 
467 	return (DDI_SUCCESS);
468 
469 fail:
470 	USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
471 	    "failed to attach");
472 
473 	(void) uhci_cleanup(uhcip);
474 
475 	return (DDI_FAILURE);
476 }
477 
478 
479 /*
480  * uhci_add_intrs:
481  *
482  * Register FIXED or MSI interrupts.
483  */
484 static int
485 uhci_add_intrs(uhci_state_t	*uhcip,
486 		int		intr_type)
487 {
488 	int	actual, avail, intr_size, count = 0;
489 	int	i, flag, ret;
490 
491 	USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
492 	    "uhci_add_intrs: interrupt type 0x%x", intr_type);
493 
494 	/* Get number of interrupts */
495 	ret = ddi_intr_get_nintrs(uhcip->uhci_dip, intr_type, &count);
496 	if ((ret != DDI_SUCCESS) || (count == 0)) {
497 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
498 		    "uhci_add_intrs: ddi_intr_get_nintrs() failure, "
499 		    "ret: %d, count: %d", ret, count);
500 
501 		return (DDI_FAILURE);
502 	}
503 
504 	/* Get number of available interrupts */
505 	ret = ddi_intr_get_navail(uhcip->uhci_dip, intr_type, &avail);
506 	if ((ret != DDI_SUCCESS) || (avail == 0)) {
507 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
508 		    "uhci_add_intrs: ddi_intr_get_navail() failure, "
509 		    "ret: %d, count: %d", ret, count);
510 
511 		return (DDI_FAILURE);
512 	}
513 
514 	if (avail < count) {
515 		USB_DPRINTF_L3(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
516 		    "uhci_add_intrs: uhci_add_intrs: nintrs () "
517 		    "returned %d, navail returned %d\n", count, avail);
518 	}
519 
520 	/* Allocate an array of interrupt handles */
521 	intr_size = count * sizeof (ddi_intr_handle_t);
522 	uhcip->uhci_htable = kmem_zalloc(intr_size, KM_SLEEP);
523 
524 	flag = (intr_type == DDI_INTR_TYPE_MSI) ?
525 	    DDI_INTR_ALLOC_STRICT:DDI_INTR_ALLOC_NORMAL;
526 
527 	/* call ddi_intr_alloc() */
528 	ret = ddi_intr_alloc(uhcip->uhci_dip, uhcip->uhci_htable,
529 	    intr_type, 0, count, &actual, flag);
530 
531 	if ((ret != DDI_SUCCESS) || (actual == 0)) {
532 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
533 		    "uhci_add_intrs: ddi_intr_alloc() failed %d", ret);
534 
535 		kmem_free(uhcip->uhci_htable, intr_size);
536 
537 		return (DDI_FAILURE);
538 	}
539 
540 	if (actual < count) {
541 		USB_DPRINTF_L3(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
542 		    "uhci_add_intrs: Requested: %d, Received: %d\n",
543 		    count, actual);
544 
545 		for (i = 0; i < actual; i++)
546 			(void) ddi_intr_free(uhcip->uhci_htable[i]);
547 
548 		kmem_free(uhcip->uhci_htable, intr_size);
549 
550 		return (DDI_FAILURE);
551 	}
552 
553 	uhcip->uhci_intr_cnt = actual;
554 
555 	if ((ret = ddi_intr_get_pri(uhcip->uhci_htable[0],
556 	    &uhcip->uhci_intr_pri)) != DDI_SUCCESS) {
557 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
558 		    "uhci_add_intrs: ddi_intr_get_pri() failed %d", ret);
559 
560 		for (i = 0; i < actual; i++)
561 			(void) ddi_intr_free(uhcip->uhci_htable[i]);
562 
563 		kmem_free(uhcip->uhci_htable, intr_size);
564 
565 		return (DDI_FAILURE);
566 	}
567 
568 	USB_DPRINTF_L3(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
569 	    "uhci_add_intrs: Supported Interrupt priority 0x%x",
570 	    uhcip->uhci_intr_pri);
571 
572 	/* Test for high level mutex */
573 	if (uhcip->uhci_intr_pri >= ddi_intr_get_hilevel_pri()) {
574 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
575 		    "uhci_add_intrs: Hi level interrupt not supported");
576 
577 		for (i = 0; i < actual; i++)
578 			(void) ddi_intr_free(uhcip->uhci_htable[i]);
579 
580 		kmem_free(uhcip->uhci_htable, intr_size);
581 
582 		return (DDI_FAILURE);
583 	}
584 
585 	/* Initialize the mutex */
586 	mutex_init(&uhcip->uhci_int_mutex, NULL, MUTEX_DRIVER,
587 	    DDI_INTR_PRI(uhcip->uhci_intr_pri));
588 
589 	/* Call ddi_intr_add_handler() */
590 	for (i = 0; i < actual; i++) {
591 		if ((ret = ddi_intr_add_handler(uhcip->uhci_htable[i],
592 		    uhci_intr, (caddr_t)uhcip,
593 		    (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) {
594 			USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
595 			    "uhci_add_intrs: ddi_intr_add_handler() "
596 			    "failed %d", ret);
597 
598 			for (i = 0; i < actual; i++)
599 				(void) ddi_intr_free(uhcip->uhci_htable[i]);
600 
601 			mutex_destroy(&uhcip->uhci_int_mutex);
602 			kmem_free(uhcip->uhci_htable, intr_size);
603 
604 			return (DDI_FAILURE);
605 		}
606 	}
607 
608 	if ((ret = ddi_intr_get_cap(uhcip->uhci_htable[0],
609 	    &uhcip->uhci_intr_cap)) != DDI_SUCCESS) {
610 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
611 		    "uhci_add_intrs: ddi_intr_get_cap() failed %d", ret);
612 
613 		for (i = 0; i < actual; i++) {
614 			(void) ddi_intr_remove_handler(uhcip->uhci_htable[i]);
615 			(void) ddi_intr_free(uhcip->uhci_htable[i]);
616 		}
617 
618 		mutex_destroy(&uhcip->uhci_int_mutex);
619 		kmem_free(uhcip->uhci_htable, intr_size);
620 
621 		return (DDI_FAILURE);
622 	}
623 
624 	return (DDI_SUCCESS);
625 }
626 
627 
628 /*
629  * Function Name:	uhci_detach
630  * Description:		Detach entry point - called by the Kernel.
631  *			Deallocates all the memory
632  *			Unregisters the interrupt handle and other resources.
633  * Output:		DDI_SUCCESS / DDI_FAILURE
634  */
635 static int
636 uhci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
637 {
638 	uhci_state_t	*uhcip = uhci_obtain_state(dip);
639 
640 	USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
641 	    "uhci_detach:");
642 
643 	switch (cmd) {
644 	case DDI_DETACH:
645 
646 		return (uhci_cleanup(uhcip) == USB_SUCCESS ?
647 		    DDI_SUCCESS : DDI_FAILURE);
648 	case DDI_SUSPEND:
649 
650 		return (uhci_cpr_suspend(uhcip));
651 	default:
652 
653 		return (DDI_FAILURE);
654 	}
655 }
656 
657 
658 /*
659  * uhci_rem_intrs:
660  *
661  * Unregister FIXED or MSI interrupts
662  */
663 static void
664 uhci_rem_intrs(uhci_state_t	*uhcip)
665 {
666 	int	i;
667 
668 	USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
669 	    "uhci_rem_intrs: interrupt type 0x%x", uhcip->uhci_intr_type);
670 
671 	/* Disable all interrupts */
672 	if (uhcip->uhci_intr_cap & DDI_INTR_FLAG_BLOCK) {
673 		(void) ddi_intr_block_disable(uhcip->uhci_htable,
674 		    uhcip->uhci_intr_cnt);
675 	} else {
676 		for (i = 0; i < uhcip->uhci_intr_cnt; i++) {
677 			(void) ddi_intr_disable(uhcip->uhci_htable[i]);
678 		}
679 	}
680 
681 	/* Call ddi_intr_remove_handler() */
682 	for (i = 0; i < uhcip->uhci_intr_cnt; i++) {
683 		(void) ddi_intr_remove_handler(uhcip->uhci_htable[i]);
684 		(void) ddi_intr_free(uhcip->uhci_htable[i]);
685 	}
686 
687 	kmem_free(uhcip->uhci_htable,
688 	    uhcip->uhci_intr_cnt * sizeof (ddi_intr_handle_t));
689 }
690 
691 
692 /*
693  * Function Name:	uhci_reset
694  * Description:		Reset entry point - called by the Kernel
695  *			on the way down.
696  *			The Toshiba laptop has been observed to	hang
697  *			on reboot when BIOS is set to suspend/resume.
698  *			The resetting uhci on the way down solves the
699  *			problem.
700  * Output:		DDI_SUCCESS / DDI_FAILURE
701  */
702 /* ARGSUSED */
703 static int
704 uhci_reset(dev_info_t *dip, ddi_reset_cmd_t cmd)
705 {
706 	uhci_state_t	*uhcip = uhci_obtain_state(dip);
707 
708 	/* Disable all HC ED list processing */
709 	Set_OpReg16(USBINTR, DISABLE_ALL_INTRS);
710 	Set_OpReg16(USBCMD, 0);
711 
712 	return (DDI_SUCCESS);
713 }
714 
715 /*
716  * quiesce(9E) entry point.
717  *
718  * This function is called when the system is single-threaded at high
719  * PIL with preemption disabled. Therefore, this function must not be
720  * blocked.
721  *
722  * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
723  * DDI_FAILURE indicates an error condition and should almost never happen.
724  */
725 static int
726 uhci_quiesce(dev_info_t *dip)
727 {
728 	uhci_state_t	*uhcip = uhci_obtain_state(dip);
729 
730 	if (uhcip == NULL)
731 		return (DDI_FAILURE);
732 
733 	/* Disable interrupts */
734 	Set_OpReg16(USBINTR, DISABLE_ALL_INTRS);
735 
736 	/* Wait for SOF time to handle the scheduled interrupt */
737 	drv_usecwait(UHCI_TIMEWAIT);
738 
739 	/* Stop the Host Controller */
740 	Set_OpReg16(USBCMD, 0);
741 
742 	/* Wait for SOF time to handle the scheduled interrupt */
743 	drv_usecwait(UHCI_TIMEWAIT);
744 
745 	/* Set Global Suspend bit */
746 	Set_OpReg16(USBCMD, USBCMD_REG_ENER_GBL_SUSPEND);
747 
748 	/* Wait for SOF time to handle the scheduled interrupt */
749 	drv_usecwait(UHCI_TIMEWAIT);
750 
751 	return (DDI_SUCCESS);
752 }
753 
754 
755 /*
756  * uhci_info:
757  */
758 /* ARGSUSED */
759 static int
760 uhci_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result)
761 {
762 	dev_t		dev;
763 	int		instance;
764 	int		error = DDI_FAILURE;
765 	uhci_state_t	*uhcip;
766 
767 	switch (infocmd) {
768 	case DDI_INFO_DEVT2DEVINFO:
769 		dev = (dev_t)arg;
770 		instance = UHCI_UNIT(dev);
771 		uhcip = ddi_get_soft_state(uhci_statep, instance);
772 		if (uhcip != NULL) {
773 			*result = (void *)uhcip->uhci_dip;
774 			if (*result != NULL) {
775 				error = DDI_SUCCESS;
776 			}
777 		} else {
778 			*result = NULL;
779 		}
780 
781 		break;
782 	case DDI_INFO_DEVT2INSTANCE:
783 		dev = (dev_t)arg;
784 		instance = UHCI_UNIT(dev);
785 		*result = (void *)(uintptr_t)instance;
786 		error = DDI_SUCCESS;
787 
788 		break;
789 	default:
790 		break;
791 	}
792 
793 	return (error);
794 }
795 
796 
797 /*
798  * uhci_cleanup:
799  *	Cleanup on attach failure or detach
800  */
801 static int
802 uhci_cleanup(uhci_state_t *uhcip)
803 {
804 	USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl, "uhci_cleanup:");
805 
806 	if (usba_hubdi_unbind_root_hub(uhcip->uhci_dip) != USB_SUCCESS) {
807 
808 		return (USB_FAILURE);
809 	}
810 
811 	mutex_enter(&uhcip->uhci_int_mutex);
812 
813 	if (uhcip->uhci_cmd_timeout_id) {
814 		timeout_id_t timeout_id = uhcip->uhci_cmd_timeout_id;
815 		uhcip->uhci_cmd_timeout_id = 0;
816 		mutex_exit(&uhcip->uhci_int_mutex);
817 		(void) untimeout(timeout_id);
818 		mutex_enter(&uhcip->uhci_int_mutex);
819 	}
820 
821 	uhci_uninit_ctlr(uhcip);
822 
823 	mutex_exit(&uhcip->uhci_int_mutex);
824 
825 	/* do interrupt cleanup */
826 	if (uhcip->uhci_htable) {
827 		uhci_rem_intrs(uhcip);
828 	}
829 
830 	mutex_enter(&uhcip->uhci_int_mutex);
831 
832 	usba_hcdi_unregister(uhcip->uhci_dip);
833 
834 	uhci_unmap_regs(uhcip);
835 
836 	uhci_free_pools(uhcip);
837 
838 	mutex_exit(&uhcip->uhci_int_mutex);
839 
840 	mutex_destroy(&uhcip->uhci_int_mutex);
841 	cv_destroy(&uhcip->uhci_cv_SOF);
842 	sema_destroy(&uhcip->uhci_ocsem);
843 
844 	/* cleanup kstat structures */
845 	uhci_destroy_stats(uhcip);
846 
847 	usba_free_hcdi_ops(uhcip->uhci_hcdi_ops);
848 	usb_free_log_hdl(uhcip->uhci_log_hdl);
849 	ddi_prop_remove_all(uhcip->uhci_dip);
850 	ddi_soft_state_free(uhci_statep, uhcip->uhci_instance);
851 
852 	return (USB_SUCCESS);
853 }
854 
855 
856 /*
857  * uhci_cpr_suspend
858  */
859 static int
860 uhci_cpr_suspend(uhci_state_t	*uhcip)
861 {
862 	USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
863 	    "uhci_cpr_suspend:");
864 
865 	/* Call into the root hub and suspend it */
866 	if (usba_hubdi_detach(uhcip->uhci_dip, DDI_SUSPEND) != DDI_SUCCESS) {
867 
868 		return (DDI_FAILURE);
869 	}
870 
871 	mutex_enter(&uhcip->uhci_int_mutex);
872 
873 	/* Disable interrupts */
874 	Set_OpReg16(USBINTR, DISABLE_ALL_INTRS);
875 
876 	mutex_exit(&uhcip->uhci_int_mutex);
877 
878 	/* Wait for SOF time to handle the scheduled interrupt */
879 	delay(drv_usectohz(UHCI_TIMEWAIT));
880 
881 	mutex_enter(&uhcip->uhci_int_mutex);
882 	/* Stop the Host Controller */
883 	Set_OpReg16(USBCMD, 0);
884 
885 	/* Set Global Suspend bit */
886 	Set_OpReg16(USBCMD, USBCMD_REG_ENER_GBL_SUSPEND);
887 
888 	/* Set host controller soft state to suspend */
889 	uhcip->uhci_hc_soft_state = UHCI_CTLR_SUSPEND_STATE;
890 
891 	mutex_exit(&uhcip->uhci_int_mutex);
892 
893 	return (USB_SUCCESS);
894 }
895 
896 
897 /*
898  * uhci_cpr_cleanup:
899  *
900  * Cleanup uhci specific information across resuming.
901  */
902 static void
903 uhci_cpr_cleanup(uhci_state_t	*uhcip)
904 {
905 	ASSERT(mutex_owned(&uhcip->uhci_int_mutex));
906 
907 	/* Reset software part of usb frame number */
908 	uhcip->uhci_sw_frnum = 0;
909 }
910 
911 
912 /*
913  * uhci_cpr_resume
914  */
915 static int
916 uhci_cpr_resume(uhci_state_t	*uhcip)
917 {
918 	USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
919 	    "uhci_cpr_resume: Restart the controller");
920 
921 	mutex_enter(&uhcip->uhci_int_mutex);
922 
923 	/* Cleanup uhci specific information across cpr */
924 	uhci_cpr_cleanup(uhcip);
925 
926 	mutex_exit(&uhcip->uhci_int_mutex);
927 
928 	/* Restart the controller */
929 	if (uhci_init_ctlr(uhcip) != DDI_SUCCESS) {
930 
931 		USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
932 		    "uhci_cpr_resume: uhci host controller resume failed ");
933 
934 		return (DDI_FAILURE);
935 	}
936 
937 	mutex_enter(&uhcip->uhci_int_mutex);
938 
939 	/*
940 	 * Set HcInterruptEnable to enable all interrupts except Root
941 	 * Hub Status change and SOF interrupts.
942 	 */
943 	Set_OpReg16(USBINTR, ENABLE_ALL_INTRS);
944 
945 	mutex_exit(&uhcip->uhci_int_mutex);
946 
947 	/* Now resume the root hub */
948 	if (usba_hubdi_attach(uhcip->uhci_dip, DDI_RESUME) != DDI_SUCCESS) {
949 
950 		return (DDI_FAILURE);
951 	}
952 
953 	return (DDI_SUCCESS);
954 }
955 
956 
957 /*
958  * uhci_intr:
959  *	uhci interrupt handling routine.
960  */
961 static uint_t
962 uhci_intr(caddr_t arg1, caddr_t arg2)
963 {
964 	ushort_t	intr_status, cmd_reg, intr_reg;
965 	uhci_state_t	*uhcip = (uhci_state_t *)arg1;
966 
967 	USB_DPRINTF_L4(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
968 	    "uhci_intr: Interrupt occurred, arg1 0x%p arg2 0x%p",
969 	    (void *)arg1, (void *)arg2);
970 
971 	mutex_enter(&uhcip->uhci_int_mutex);
972 
973 	/* Any interrupt is not handled for the suspended device. */
974 	if (uhcip->uhci_hc_soft_state == UHCI_CTLR_SUSPEND_STATE) {
975 		mutex_exit(&uhcip->uhci_int_mutex);
976 
977 		return (DDI_INTR_UNCLAIMED);
978 	}
979 
980 	/* Get the status of the interrupts */
981 	intr_status = Get_OpReg16(USBSTS);
982 	intr_reg = Get_OpReg16(USBINTR);
983 
984 	USB_DPRINTF_L3(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
985 	    "uhci_intr: intr_status = %x, intr_reg = %x",
986 	    intr_status, intr_reg);
987 
988 	/*
989 	 * If uhci interrupts are all disabled, the driver should return
990 	 * unclaimed.
991 	 * HC Process Error and Host System Error interrupts cannot be
992 	 * disabled by intr register, and need to be judged separately.
993 	 */
994 	if (((intr_reg & ENABLE_ALL_INTRS) == 0) &&
995 	    ((intr_status & USBSTS_REG_HC_PROCESS_ERR) == 0) &&
996 	    ((intr_status & USBSTS_REG_HOST_SYS_ERR) == 0)) {
997 
998 		USB_DPRINTF_L3(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
999 		    "uhci_intr: interrupts disabled, unclaim");
1000 		mutex_exit(&uhcip->uhci_int_mutex);
1001 
1002 		return (DDI_INTR_UNCLAIMED);
1003 	}
1004 
1005 	/*
1006 	 * If the intr is not from our controller, just return unclaimed.
1007 	 * HCHalted status bit cannot generate interrupts and should be
1008 	 * ignored.
1009 	 */
1010 	if (!(intr_status & UHCI_INTR_MASK)) {
1011 
1012 		USB_DPRINTF_L3(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
1013 		    "uhci_intr: no interrupt status set, unclaim");
1014 		mutex_exit(&uhcip->uhci_int_mutex);
1015 
1016 		return (DDI_INTR_UNCLAIMED);
1017 	}
1018 
1019 	/* Update kstat values */
1020 	uhci_do_intrs_stats(uhcip, intr_status);
1021 
1022 	/* Acknowledge the interrupt */
1023 	Set_OpReg16(USBSTS, intr_status);
1024 
1025 	/*
1026 	 * If uhci controller has not been initialized, just clear the
1027 	 * interrupter status and return claimed.
1028 	 */
1029 	if (uhcip->uhci_hc_soft_state != UHCI_CTLR_OPERATIONAL_STATE) {
1030 
1031 		USB_DPRINTF_L2(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
1032 		    "uhci_intr: uhci controller is not in the operational "
1033 		    "state");
1034 		mutex_exit(&uhcip->uhci_int_mutex);
1035 
1036 		return (DDI_INTR_CLAIMED);
1037 	}
1038 
1039 	/*
1040 	 * We configured the hw incorrectly, disable future interrupts.
1041 	 */
1042 	if ((intr_status & USBSTS_REG_HOST_SYS_ERR)) {
1043 		USB_DPRINTF_L2(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
1044 		    "uhci_intr: Sys Err Disabling Interrupt");
1045 		Set_OpReg16(USBINTR, DISABLE_ALL_INTRS);
1046 		uhcip->uhci_hc_soft_state = UHCI_CTLR_ERROR_STATE;
1047 
1048 		mutex_exit(&uhcip->uhci_int_mutex);
1049 
1050 		return (DDI_INTR_CLAIMED);
1051 	}
1052 
1053 	/*
1054 	 * Check whether a frame number overflow occurred.
1055 	 * if so, update the sw frame number.
1056 	 */
1057 	uhci_isoc_update_sw_frame_number(uhcip);
1058 
1059 	/*
1060 	 * Check whether any commands got completed. If so, process them.
1061 	 */
1062 	uhci_process_submitted_td_queue(uhcip);
1063 
1064 	/*
1065 	 * This should not occur. It occurs only if a HC controller
1066 	 * experiences internal problem.
1067 	 */
1068 	if (intr_status & USBSTS_REG_HC_HALTED) {
1069 		USB_DPRINTF_L2(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
1070 		    "uhci_intr: Controller halted");
1071 		cmd_reg = Get_OpReg16(USBCMD);
1072 		Set_OpReg16(USBCMD, (cmd_reg | USBCMD_REG_HC_RUN));
1073 	}
1074 
1075 	/*
1076 	 * Wake up all the threads which are waiting for the Start of Frame
1077 	 */
1078 	if (uhcip->uhci_cv_signal == B_TRUE) {
1079 		cv_broadcast(&uhcip->uhci_cv_SOF);
1080 		uhcip->uhci_cv_signal = B_FALSE;
1081 	}
1082 
1083 	mutex_exit(&uhcip->uhci_int_mutex);
1084 
1085 	return (DDI_INTR_CLAIMED);
1086 }
1087 
1088 
1089 /*
1090  * uhci_process_submitted_td_queue:
1091  *    Traverse thru the submitted queue and process the completed ones.
1092  */
1093 void
1094 uhci_process_submitted_td_queue(uhci_state_t *uhcip)
1095 {
1096 	uhci_td_t		*head = uhcip->uhci_outst_tds_head;
1097 	uhci_trans_wrapper_t	*tw;
1098 
1099 	while (head != NULL) {
1100 		if ((!(GetTD_status(uhcip, head) & UHCI_TD_ACTIVE)) &&
1101 		    (head->tw->tw_claim == UHCI_NOT_CLAIMED)) {
1102 			tw = head->tw;
1103 
1104 			/*
1105 			 * Call the corresponding handle_td routine
1106 			 */
1107 			(*tw->tw_handle_td)(uhcip, head);
1108 
1109 			/* restart at the beginning again */
1110 			head = uhcip->uhci_outst_tds_head;
1111 		} else {
1112 			head = head->outst_td_next;
1113 		}
1114 	}
1115 }
1116 
1117 
1118 /*
1119  * uhci_handle_intr_td:
1120  *     handles the completed interrupt transfer TD's.
1121  */
1122 void
1123 uhci_handle_intr_td(uhci_state_t *uhcip, uhci_td_t *td)
1124 {
1125 	usb_req_attrs_t		attrs;
1126 	uint_t			bytes_xfered;
1127 	usb_cr_t		usb_err;
1128 	uhci_trans_wrapper_t	*tw = td->tw;
1129 	uhci_pipe_private_t	*pp = tw->tw_pipe_private;
1130 	usb_intr_req_t		*intr_reqp =
1131 	    (usb_intr_req_t *)tw->tw_curr_xfer_reqp;
1132 	usba_pipe_handle_data_t	*ph = pp->pp_pipe_handle;
1133 
1134 	USB_DPRINTF_L4(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1135 	    "uhci_handle_intr_td: intr_reqp = 0x%p", (void *)intr_reqp);
1136 
1137 	ASSERT(mutex_owned(&uhcip->uhci_int_mutex));
1138 
1139 	/* set tw->tw_claim flag, so that nobody else works on this td. */
1140 	tw->tw_claim = UHCI_INTR_HDLR_CLAIMED;
1141 
1142 	/* Interrupt OUT */
1143 	if (UHCI_XFER_DIR(&ph->p_ep) == USB_EP_DIR_OUT) {
1144 
1145 		/* process errors first */
1146 		usb_err = uhci_parse_td_error(uhcip, pp, td);
1147 
1148 		/* get the actual xfered data size */
1149 		bytes_xfered = GetTD_alen(uhcip, td);
1150 
1151 		/* check data underrun error */
1152 		if ((usb_err == USB_CR_OK) && (bytes_xfered !=
1153 		    GetTD_mlen(uhcip, td))) {
1154 
1155 			USB_DPRINTF_L2(PRINT_MASK_LISTS,
1156 			    uhcip->uhci_log_hdl, "uhci_handle_intr_td:"
1157 			    " Intr out pipe, data underrun occurred");
1158 
1159 			usb_err = USB_CR_DATA_UNDERRUN;
1160 
1161 		}
1162 
1163 		bytes_xfered = (bytes_xfered == ZERO_LENGTH) ?
1164 		    0 : bytes_xfered+1;
1165 		tw->tw_bytes_xfered += bytes_xfered;
1166 		uhci_do_byte_stats(uhcip, tw->tw_bytes_xfered,
1167 		    ph->p_ep.bmAttributes, ph->p_ep.bEndpointAddress);
1168 
1169 
1170 		/*
1171 		 * If error occurred or all data xfered, delete the current td,
1172 		 * free tw, do the callback. Otherwise wait for the next td.
1173 		 */
1174 		if (usb_err != USB_CR_OK) {
1175 
1176 			USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1177 			    "uhci_handle_intr_td: Intr out pipe error");
1178 
1179 			/* update the element pointer */
1180 			SetQH32(uhcip, pp->pp_qh->element_ptr, GetTD32(
1181 			    uhcip, tw->tw_hctd_tail->link_ptr));
1182 
1183 
1184 		} else if (tw->tw_bytes_xfered == tw->tw_length) {
1185 
1186 			/* all data xfered */
1187 			USB_DPRINTF_L3(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1188 			    "uhci_handle_intr_td: Intr out pipe,"
1189 			    " all data xfered");
1190 
1191 		} else {
1192 
1193 			/* remove the current td and wait for the next one. */
1194 			uhci_delete_td(uhcip, td);
1195 			tw->tw_claim = UHCI_NOT_CLAIMED;
1196 
1197 			return;
1198 		}
1199 
1200 		uhci_delete_td(uhcip, td);
1201 		uhci_hcdi_callback(uhcip, pp, ph, tw, usb_err);
1202 		uhci_deallocate_tw(uhcip, tw->tw_pipe_private, tw);
1203 
1204 		return;
1205 	}
1206 
1207 	/* Interrupt IN */
1208 
1209 	/* Get the actual received data size */
1210 	tw->tw_bytes_xfered = GetTD_alen(uhcip, td);
1211 	if (tw->tw_bytes_xfered == ZERO_LENGTH) {
1212 		tw->tw_bytes_xfered = 0;
1213 	} else {
1214 		tw->tw_bytes_xfered++;
1215 	}
1216 
1217 	/* process errors first */
1218 	if (GetTD_status(uhcip, td) & TD_STATUS_MASK) {
1219 		SetQH32(uhcip, pp->pp_qh->element_ptr,
1220 		    GetTD32(uhcip, td->link_ptr));
1221 
1222 		uhci_handle_intr_td_errors(uhcip, td, tw, pp);
1223 
1224 		return;
1225 	}
1226 
1227 	/*
1228 	 * Check for data underruns.
1229 	 * For data underrun case, the host controller does not update
1230 	 * element pointer. So, we update here.
1231 	 */
1232 	if (GetTD_alen(uhcip, td) != GetTD_mlen(uhcip, td)) {
1233 		SetQH32(uhcip, pp->pp_qh->element_ptr,
1234 		    GetTD32(uhcip, td->link_ptr));
1235 	}
1236 
1237 	/*
1238 	 * Call uhci_sendup_td_message to send message upstream.
1239 	 * The function uhci_sendup_td_message returns USB_NO_RESOURCES
1240 	 * if allocb fails and also sends error message to upstream by
1241 	 * calling USBA callback function. Under error conditions just
1242 	 * drop the current message.
1243 	 */
1244 
1245 	/* Get the interrupt xfer attributes */
1246 	attrs = intr_reqp->intr_attributes;
1247 
1248 	/*
1249 	 * Check usb flag whether USB_FLAGS_ONE_XFER flag is set
1250 	 * and if so, free duplicate request.
1251 	 */
1252 	if (attrs & USB_ATTRS_ONE_XFER) {
1253 		uhci_handle_one_xfer_completion(uhcip, USB_CR_OK, td);
1254 
1255 		return;
1256 	}
1257 
1258 	/* save it temporarily */
1259 	if (tw->tw_bytes_xfered != 0) {
1260 		uhci_sendup_td_message(uhcip, USB_CR_OK, tw);
1261 	}
1262 
1263 	/* Clear the tw->tw_claim flag */
1264 	tw->tw_claim = UHCI_NOT_CLAIMED;
1265 
1266 	uhci_delete_td(uhcip, td);
1267 
1268 	/* allocate another interrupt periodic resource */
1269 	if (pp->pp_state == UHCI_PIPE_STATE_ACTIVE) {
1270 		if (uhci_allocate_periodic_in_resource(uhcip, pp, tw, 0) !=
1271 		    USB_SUCCESS) {
1272 			USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1273 			    "uhci_insert_intr_req: Interrupt request structure"
1274 			    "allocation failed");
1275 
1276 			uhci_hcdi_callback(uhcip, pp, ph,
1277 			    tw, USB_CR_NO_RESOURCES);
1278 
1279 			return;
1280 		}
1281 
1282 		/* Insert another interrupt TD */
1283 		if (uhci_insert_hc_td(uhcip, 0,
1284 		    tw->tw_length, pp, tw, PID_IN, attrs) != USB_SUCCESS) {
1285 
1286 			uhci_deallocate_periodic_in_resource(uhcip, pp, tw);
1287 
1288 			USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1289 			    "uhci_handle_intr_td: TD exhausted");
1290 
1291 			uhci_hcdi_callback(uhcip, pp, ph,
1292 			    tw, USB_CR_NO_RESOURCES);
1293 		}
1294 	}
1295 }
1296 
1297 
1298 /*
1299  * uhci_sendup_td_message:
1300  *
1301  * Get a message block and send the received message upstream.
1302  */
1303 void
1304 uhci_sendup_td_message(
1305 	uhci_state_t		*uhcip,
1306 	usb_cr_t		usb_err,
1307 	uhci_trans_wrapper_t	*tw)
1308 {
1309 	mblk_t			*mp = NULL;
1310 	size_t			length = 0;
1311 	size_t			skip_len = 0;
1312 	uchar_t			*buf;
1313 	usb_opaque_t		curr_xfer_reqp = tw->tw_curr_xfer_reqp;
1314 	uhci_pipe_private_t	*pp = tw->tw_pipe_private;
1315 	usb_ep_descr_t		*ept = &pp->pp_pipe_handle->p_ep;
1316 
1317 	ASSERT(mutex_owned(&uhcip->uhci_int_mutex));
1318 
1319 	USB_DPRINTF_L4(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1320 	    "uhci_sendup_td_message: bytes transferred=0x%x, "
1321 	    "bytes pending=0x%x",
1322 	    tw->tw_bytes_xfered, tw->tw_bytes_pending);
1323 
1324 	length = tw->tw_bytes_xfered;
1325 
1326 	switch (UHCI_XFER_TYPE(ept)) {
1327 	case USB_EP_ATTR_CONTROL:
1328 		skip_len = UHCI_CTRL_EPT_MAX_SIZE; /* length to skip */
1329 		mp = ((usb_ctrl_req_t *)curr_xfer_reqp)->ctrl_data;
1330 		break;
1331 	case USB_EP_ATTR_INTR:
1332 		mp = ((usb_intr_req_t *)curr_xfer_reqp)->intr_data;
1333 		break;
1334 	case USB_EP_ATTR_BULK:
1335 		mp = ((usb_bulk_req_t *)curr_xfer_reqp)->bulk_data;
1336 		break;
1337 	case USB_EP_ATTR_ISOCH:
1338 		length = tw->tw_length;
1339 		mp = ((usb_isoc_req_t *)curr_xfer_reqp)->isoc_data;
1340 		break;
1341 	default:
1342 		break;
1343 	}
1344 
1345 	/* Copy the data into the mblk_t */
1346 	buf = (uchar_t *)tw->tw_buf + skip_len;
1347 
1348 	ASSERT(mp != NULL);
1349 
1350 	/*
1351 	 * Update kstat byte counts
1352 	 * The control endpoints don't have direction bits so in
1353 	 * order for control stats to be counted correctly an IN
1354 	 * bit must be faked on a control read.
1355 	 */
1356 	uhci_do_byte_stats(uhcip, length, ept->bmAttributes,
1357 	    (UHCI_XFER_TYPE(ept) == USB_EP_ATTR_CONTROL) ?
1358 	    USB_EP_DIR_IN : ept->bEndpointAddress);
1359 
1360 	if (length) {
1361 		int rval, i;
1362 		uchar_t *p = mp->b_rptr;
1363 
1364 		if (UHCI_XFER_TYPE(ept) == USB_EP_ATTR_ISOCH) {
1365 			/* Deal with isoc data by packets */
1366 			for (i = 0; i < tw->tw_ncookies; i++) {
1367 				rval = ddi_dma_sync(
1368 				    tw->tw_isoc_bufs[i].dma_handle, 0,
1369 				    tw->tw_isoc_bufs[i].length,
1370 				    DDI_DMA_SYNC_FORCPU);
1371 				ASSERT(rval == DDI_SUCCESS);
1372 
1373 				ddi_rep_get8(tw->tw_isoc_bufs[i].mem_handle,
1374 				    p, (uint8_t *)tw->tw_isoc_bufs[i].buf_addr,
1375 				    tw->tw_isoc_bufs[i].length,
1376 				    DDI_DEV_AUTOINCR);
1377 				p += tw->tw_isoc_bufs[i].length;
1378 			}
1379 		} else {
1380 			/* Sync the streaming buffer */
1381 			rval = ddi_dma_sync(tw->tw_dmahandle, 0,
1382 			    (skip_len + length), DDI_DMA_SYNC_FORCPU);
1383 			ASSERT(rval == DDI_SUCCESS);
1384 
1385 			/* Copy the data into the message */
1386 			ddi_rep_get8(tw->tw_accesshandle,
1387 			    mp->b_rptr, buf, length, DDI_DEV_AUTOINCR);
1388 		}
1389 
1390 		/* Increment the write pointer */
1391 		mp->b_wptr += length;
1392 	} else {
1393 		USB_DPRINTF_L3(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1394 		    "uhci_sendup_td_message: Zero length packet");
1395 	}
1396 
1397 	/* Do the callback */
1398 	uhci_hcdi_callback(uhcip, pp, pp->pp_pipe_handle, tw, usb_err);
1399 }
1400 
1401 
1402 /*
1403  * uhci_handle_ctrl_td:
1404  *	Handle a control Transfer Descriptor (TD).
1405  */
1406 void
1407 uhci_handle_ctrl_td(uhci_state_t *uhcip, uhci_td_t *td)
1408 {
1409 	ushort_t		direction;
1410 	ushort_t		bytes_for_xfer;
1411 	ushort_t		bytes_xfered;
1412 	ushort_t		MaxPacketSize;
1413 	usb_cr_t		error;
1414 	uhci_trans_wrapper_t	*tw = td->tw;
1415 	uhci_pipe_private_t	*pp = tw->tw_pipe_private;
1416 	usba_pipe_handle_data_t	*usb_pp = pp->pp_pipe_handle;
1417 	usb_ep_descr_t		*eptd = &usb_pp->p_ep;
1418 	usb_ctrl_req_t		*reqp = (usb_ctrl_req_t *)tw->tw_curr_xfer_reqp;
1419 
1420 	USB_DPRINTF_L4(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1421 	    "uhci_handle_ctrl_td: pp = 0x%p tw = 0x%p td = 0x%p "
1422 	    "state = 0x%x len = 0x%lx", (void *)pp, (void *)tw,
1423 	    (void *)td, tw->tw_ctrl_state, tw->tw_length);
1424 
1425 	ASSERT(mutex_owned(&uhcip->uhci_int_mutex));
1426 
1427 	error = uhci_parse_td_error(uhcip, pp, td);
1428 
1429 	/*
1430 	 * In case of control transfers, the device can send NAK when it
1431 	 * is busy. If a NAK is received, then send the status TD again.
1432 	 */
1433 	if (error != USB_CR_OK) {
1434 		USB_DPRINTF_L3(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1435 		    "uhci_handle_ctrl_td: Ctrl cmd failed, error = %x", error);
1436 
1437 		SetQH32(uhcip, pp->pp_qh->element_ptr,
1438 		    GetTD32(uhcip, td->link_ptr));
1439 		uhci_delete_td(uhcip, td);
1440 
1441 		/* Return number of bytes xfered */
1442 		if (GetTD_alen(uhcip, td) != ZERO_LENGTH) {
1443 			tw->tw_bytes_xfered = GetTD_alen(uhcip, td) + 1;
1444 		}
1445 
1446 		USB_DPRINTF_L3(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1447 		    "uhci_handle_ctrl_td: Bytes transferred = %x",
1448 		    tw->tw_bytes_xfered);
1449 
1450 		if ((tw->tw_ctrl_state == DATA) &&
1451 		    (tw->tw_direction == PID_IN)) {
1452 			uhci_sendup_td_message(uhcip, error, tw);
1453 		} else {
1454 			uhci_hcdi_callback(uhcip, pp, usb_pp, tw, error);
1455 
1456 			uhci_deallocate_tw(uhcip, pp, tw);
1457 		}
1458 
1459 		return;
1460 	}
1461 
1462 	/*
1463 	 * A control transfer consists of three phases:
1464 	 *	- Setup
1465 	 *	- Data (optional)
1466 	 *	- Status
1467 	 *
1468 	 * There is a TD per phase. A TD for a given phase isn't
1469 	 * enqueued until the previous phase is finished.
1470 	 */
1471 	switch (tw->tw_ctrl_state) {
1472 	case SETUP:
1473 		/*
1474 		 * Enqueue either the data or the status
1475 		 * phase depending on the length.
1476 		 */
1477 		pp->pp_data_toggle = 1;
1478 		uhci_delete_td(uhcip, td);
1479 
1480 		/*
1481 		 * If the length is 0, move to the status.
1482 		 * If length is not 0, then we have some data
1483 		 * to move on the bus to device either IN or OUT.
1484 		 */
1485 		if ((tw->tw_length - SETUP_SIZE) == 0) {
1486 			/*
1487 			 * There is no data stage,  then
1488 			 * initiate status phase from the host.
1489 			 */
1490 			if ((uhci_insert_hc_td(uhcip, 0, 0, pp, tw, PID_IN,
1491 			    reqp->ctrl_attributes)) != USB_SUCCESS) {
1492 				USB_DPRINTF_L2(PRINT_MASK_LISTS,
1493 				    uhcip->uhci_log_hdl,
1494 				    "uhci_handle_ctrl_td: No resources");
1495 
1496 				uhci_hcdi_callback(uhcip, pp, usb_pp, tw,
1497 				    USB_CR_NO_RESOURCES);
1498 
1499 				return;
1500 			}
1501 
1502 			tw->tw_ctrl_state = STATUS;
1503 		} else {
1504 			uint_t xx;
1505 
1506 			/*
1507 			 * Each USB device can send/receive 8/16/32/64
1508 			 * depending on wMaxPacketSize's implementation.
1509 			 * We need to insert 'N = Number of byte/
1510 			 * MaxpktSize" TD's in the lattice to send/
1511 			 * receive the data. Though the USB protocol
1512 			 * allows to insert more than one TD in the same
1513 			 * frame, we are inserting only one TD in one
1514 			 * frame. This is bcos OHCI has seen some problem
1515 			 * when multiple TD's are inserted at the same time.
1516 			 */
1517 			tw->tw_length -= UHCI_CTRL_EPT_MAX_SIZE;
1518 			MaxPacketSize = eptd->wMaxPacketSize;
1519 
1520 			/*
1521 			 * We dont know the maximum packet size that
1522 			 * the device can handle(MaxPAcketSize=0).
1523 			 * In that case insert a data phase with
1524 			 * eight bytes or less.
1525 			 */
1526 			if (MaxPacketSize == 0) {
1527 				xx = (tw->tw_length > 8) ? 8 : tw->tw_length;
1528 			} else {
1529 				xx = (tw->tw_length > MaxPacketSize) ?
1530 				    MaxPacketSize : tw->tw_length;
1531 			}
1532 
1533 			tw->tw_tmp = xx;
1534 
1535 			/*
1536 			 * Create the TD.  If this is an OUT
1537 			 * transaction,  the data is already
1538 			 * in the buffer of the TW.
1539 			 * Get first 8 bytes of the command only.
1540 			 */
1541 			if ((uhci_insert_hc_td(uhcip,
1542 			    UHCI_CTRL_EPT_MAX_SIZE, xx,
1543 			    pp, tw, tw->tw_direction,
1544 			    reqp->ctrl_attributes)) != USB_SUCCESS) {
1545 
1546 				USB_DPRINTF_L2(PRINT_MASK_LISTS,
1547 				    uhcip->uhci_log_hdl,
1548 				    "uhci_handle_ctrl_td: No resources");
1549 
1550 				uhci_hcdi_callback(uhcip, pp, usb_pp, tw,
1551 				    USB_CR_NO_RESOURCES);
1552 
1553 				return;
1554 			}
1555 
1556 			tw->tw_ctrl_state = DATA;
1557 		}
1558 
1559 		USB_DPRINTF_L3(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1560 		    "Setup complete: pp 0x%p td 0x%p", (void *)pp, (void *)td);
1561 
1562 		break;
1563 	case DATA:
1564 		uhci_delete_td(uhcip, td);
1565 
1566 		MaxPacketSize = eptd->wMaxPacketSize;
1567 
1568 		/*
1569 		 * Decrement pending bytes and increment the total
1570 		 * number bytes transferred by the actual number of bytes
1571 		 * transferred in this TD. If the number of bytes transferred
1572 		 * is less than requested, that means an underrun has
1573 		 * occurred. Set the tw_tmp varible to indicate UNDER run.
1574 		 */
1575 		bytes_xfered = GetTD_alen(uhcip, td);
1576 		if (bytes_xfered == ZERO_LENGTH) {
1577 			bytes_xfered = 0;
1578 		} else {
1579 			bytes_xfered++;
1580 		}
1581 
1582 		tw->tw_bytes_pending -= bytes_xfered;
1583 		tw->tw_bytes_xfered += bytes_xfered;
1584 
1585 		if (bytes_xfered < tw->tw_tmp) {
1586 			tw->tw_bytes_pending = 0;
1587 			tw->tw_tmp = UHCI_UNDERRUN_OCCURRED;
1588 
1589 			/*
1590 			 * Controller does not update the queue head
1591 			 * element pointer when a data underrun occurs.
1592 			 */
1593 			SetQH32(uhcip, pp->pp_qh->element_ptr,
1594 			    GetTD32(uhcip, td->link_ptr));
1595 		}
1596 
1597 		if (bytes_xfered > tw->tw_tmp) {
1598 			tw->tw_bytes_pending = 0;
1599 			tw->tw_tmp = UHCI_OVERRUN_OCCURRED;
1600 		}
1601 
1602 		/*
1603 		 * If no more bytes are pending, insert status
1604 		 * phase. Otherwise insert data phase.
1605 		 */
1606 		if (tw->tw_bytes_pending) {
1607 			bytes_for_xfer = (tw->tw_bytes_pending >
1608 			    MaxPacketSize) ? MaxPacketSize :
1609 			    tw->tw_bytes_pending;
1610 
1611 			tw->tw_tmp = bytes_for_xfer;
1612 
1613 			if ((uhci_insert_hc_td(uhcip,
1614 			    UHCI_CTRL_EPT_MAX_SIZE + tw->tw_bytes_xfered,
1615 			    bytes_for_xfer, pp, tw,
1616 			    tw->tw_direction,
1617 			    reqp->ctrl_attributes)) != USB_SUCCESS) {
1618 				USB_DPRINTF_L2(PRINT_MASK_LISTS,
1619 				    uhcip->uhci_log_hdl,
1620 				    "uhci_handle_ctrl_td: No TD");
1621 
1622 				uhci_hcdi_callback(uhcip, pp, usb_pp,
1623 				    tw, USB_NO_RESOURCES);
1624 
1625 				return;
1626 			}
1627 
1628 			tw->tw_ctrl_state = DATA;
1629 
1630 			break;
1631 		}
1632 
1633 		pp->pp_data_toggle = 1;
1634 		direction = (tw->tw_direction == PID_IN) ? PID_OUT : PID_IN;
1635 
1636 		if ((uhci_insert_hc_td(uhcip, 0, 0, pp, tw, direction,
1637 		    reqp->ctrl_attributes)) != USB_SUCCESS) {
1638 			USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1639 			    "uhci_handle_ctrl_td: TD exhausted");
1640 
1641 			uhci_hcdi_callback(uhcip, pp, usb_pp, tw,
1642 			    USB_NO_RESOURCES);
1643 
1644 			return;
1645 		}
1646 
1647 		tw->tw_ctrl_state = STATUS;
1648 		USB_DPRINTF_L3(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1649 		    "Data complete: pp 0x%p td 0x%p", (void *)pp, (void *)td);
1650 
1651 		break;
1652 	case STATUS:
1653 		/*
1654 		 * Send the data to the client if it is a DATA IN,
1655 		 * else send just return status for DATA OUT commnads.
1656 		 * And set the tw_claim flag.
1657 		 */
1658 		tw->tw_claim = UHCI_INTR_HDLR_CLAIMED;
1659 
1660 		if ((tw->tw_length != 0) && (tw->tw_direction == PID_IN)) {
1661 			usb_req_attrs_t	attrs = ((usb_ctrl_req_t *)
1662 			    tw->tw_curr_xfer_reqp)->ctrl_attributes;
1663 			/*
1664 			 * Call uhci_sendup_td_message to send message
1665 			 * upstream. The function uhci_sendup_td_message
1666 			 * returns USB_NO_RESOURCES if allocb fails and
1667 			 * also sends error message to upstream by calling
1668 			 * USBA callback function.
1669 			 *
1670 			 * Under error conditions just drop the current msg.
1671 			 */
1672 			if ((tw->tw_tmp == UHCI_UNDERRUN_OCCURRED) &&
1673 			    (!(attrs & USB_ATTRS_SHORT_XFER_OK))) {
1674 				error = USB_CR_DATA_UNDERRUN;
1675 			} else if (tw->tw_tmp == UHCI_OVERRUN_OCCURRED) {
1676 				error = USB_CR_DATA_OVERRUN;
1677 			}
1678 			uhci_sendup_td_message(uhcip, error, tw);
1679 
1680 		} else {
1681 			uhci_do_byte_stats(uhcip, tw->tw_length,
1682 			    eptd->bmAttributes, eptd->bEndpointAddress);
1683 
1684 			uhci_hcdi_callback(uhcip, pp, usb_pp, tw, USB_CR_OK);
1685 		}
1686 
1687 		USB_DPRINTF_L3(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1688 		    "Status complete: pp 0x%p td 0x%p", (void *)pp, (void *)td);
1689 
1690 		uhci_delete_td(uhcip, td);
1691 		uhci_deallocate_tw(uhcip, pp, tw);
1692 
1693 		break;
1694 	default:
1695 		USB_DPRINTF_L2(PRINT_MASK_INTR, uhcip->uhci_log_hdl,
1696 		    "uhci_handle_ctrl_td: Bad control state");
1697 
1698 		uhci_hcdi_callback(uhcip, pp, usb_pp, tw,
1699 		    USB_CR_UNSPECIFIED_ERR);
1700 	}
1701 }
1702 
1703 
1704 /*
1705  * uhci_handle_intr_td_errors:
1706  *	Handles the errors encountered for the interrupt transfers.
1707  */
1708 static void
1709 uhci_handle_intr_td_errors(uhci_state_t *uhcip, uhci_td_t *td,
1710     uhci_trans_wrapper_t *tw, uhci_pipe_private_t *pp)
1711 {
1712 	usb_cr_t		usb_err;
1713 	usb_intr_req_t		*intr_reqp =
1714 	    (usb_intr_req_t *)tw->tw_curr_xfer_reqp;
1715 
1716 	USB_DPRINTF_L4(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1717 	    "uhci_handle_intr_td_errors: td = 0x%p tw = 0x%p",
1718 	    (void *)td, (void *)tw);
1719 
1720 	usb_err = uhci_parse_td_error(uhcip, pp, td);
1721 
1722 	if (intr_reqp->intr_attributes & USB_ATTRS_ONE_XFER) {
1723 		uhci_handle_one_xfer_completion(uhcip, usb_err, td);
1724 
1725 		return;
1726 	}
1727 
1728 	uhci_delete_td(uhcip, td);
1729 	uhci_sendup_td_message(uhcip, usb_err, tw);
1730 	uhci_deallocate_tw(uhcip, tw->tw_pipe_private, tw);
1731 }
1732 
1733 
1734 /*
1735  * uhci_handle_one_xfer_completion:
1736  */
1737 static void
1738 uhci_handle_one_xfer_completion(
1739 	uhci_state_t		*uhcip,
1740 	usb_cr_t		usb_err,
1741 	uhci_td_t		*td)
1742 {
1743 	uhci_trans_wrapper_t	*tw = td->tw;
1744 	uhci_pipe_private_t	*pp = tw->tw_pipe_private;
1745 	usba_pipe_handle_data_t	*ph = pp->pp_pipe_handle;
1746 	usb_intr_req_t		*intr_reqp =
1747 	    (usb_intr_req_t *)tw->tw_curr_xfer_reqp;
1748 
1749 	USB_DPRINTF_L4(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1750 	    "uhci_handle_one_xfer_completion: td = 0x%p", (void *)td);
1751 
1752 	ASSERT(intr_reqp->intr_attributes & USB_ATTRS_ONE_XFER);
1753 
1754 	/* set state to idle */
1755 	pp->pp_state = UHCI_PIPE_STATE_IDLE;
1756 
1757 	((usb_intr_req_t *)(pp->pp_client_periodic_in_reqp))->
1758 	    intr_data = ((usb_intr_req_t *)(tw->tw_curr_xfer_reqp))->intr_data;
1759 
1760 	((usb_intr_req_t *)tw->tw_curr_xfer_reqp)->intr_data = NULL;
1761 
1762 	/* now free duplicate current request */
1763 	usb_free_intr_req((usb_intr_req_t *)tw->tw_curr_xfer_reqp);
1764 	mutex_enter(&ph->p_mutex);
1765 	ph->p_req_count--;
1766 	mutex_exit(&ph->p_mutex);
1767 
1768 	/* make client's request the current request */
1769 	tw->tw_curr_xfer_reqp = pp->pp_client_periodic_in_reqp;
1770 	pp->pp_client_periodic_in_reqp = NULL;
1771 
1772 	uhci_sendup_td_message(uhcip, usb_err, tw);
1773 	/* Clear the tw->tw_claim flag */
1774 	tw->tw_claim = UHCI_NOT_CLAIMED;
1775 
1776 	uhci_delete_td(uhcip, td);
1777 	uhci_deallocate_tw(uhcip, pp, tw);
1778 }
1779 
1780 
1781 /*
1782  * uhci_parse_td_error
1783  *	Parses the Transfer Descriptors error
1784  */
1785 usb_cr_t
1786 uhci_parse_td_error(uhci_state_t *uhcip, uhci_pipe_private_t *pp, uhci_td_t *td)
1787 {
1788 	uint_t	status;
1789 
1790 	status = GetTD_status(uhcip, td) & TD_STATUS_MASK;
1791 
1792 	USB_DPRINTF_L4(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1793 	    "uhci_parse_td_error: status_bits=0x%x", status);
1794 
1795 	if (UHCI_XFER_TYPE(&pp->pp_pipe_handle->p_ep) == USB_EP_ATTR_ISOCH) {
1796 
1797 		return (USB_CR_OK);
1798 	}
1799 
1800 	if (!status) {
1801 
1802 		return (USB_CR_OK);
1803 	}
1804 
1805 	USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1806 	    "uhci_parse_td_error: status_bits=0x%x", status);
1807 
1808 
1809 	if (status & UHCI_TD_BITSTUFF_ERR) {
1810 
1811 		return (USB_CR_BITSTUFFING);
1812 	}
1813 
1814 	if (status & UHCI_TD_CRC_TIMEOUT) {
1815 		pp->pp_data_toggle = GetTD_dtogg(uhcip, td);
1816 
1817 		USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1818 		    "uhci_parse_td_error: timeout & data toggle reset; "
1819 		    "data toggle: %x", pp->pp_data_toggle);
1820 
1821 		return ((GetTD_PID(uhcip, td) == PID_IN) ? USB_CR_DEV_NOT_RESP :
1822 		    USB_CR_TIMEOUT);
1823 	}
1824 
1825 	if (status & UHCI_TD_BABBLE_ERR) {
1826 		USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1827 		    "babble error");
1828 
1829 		return (USB_CR_UNSPECIFIED_ERR);
1830 	}
1831 
1832 	if (status & UHCI_TD_DATA_BUFFER_ERR) {
1833 		USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1834 		    "buffer error");
1835 
1836 		return ((GetTD_PID(uhcip, td) == PID_IN) ?
1837 		    USB_CR_BUFFER_OVERRUN : USB_CR_BUFFER_UNDERRUN);
1838 	}
1839 
1840 	if (status & UHCI_TD_STALLED) {
1841 		pp->pp_data_toggle = 0;
1842 		USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1843 		    "uhci_parse_td_error: stall; data toggle reset; "
1844 		    "data toggle: %x", pp->pp_data_toggle);
1845 
1846 		return (USB_CR_STALL);
1847 	}
1848 
1849 	if (status) {
1850 		USB_DPRINTF_L2(PRINT_MASK_LISTS, uhcip->uhci_log_hdl,
1851 		    "unspecified error=0x%x", status);
1852 	}
1853 
1854 	return (USB_CR_OK);
1855 }
1856 
1857 
1858 static dev_info_t *
1859 uhci_get_dip(dev_t dev)
1860 {
1861 	int instance = UHCI_UNIT(dev);
1862 	uhci_state_t *uhcip = ddi_get_soft_state(uhci_statep, instance);
1863 
1864 	return (uhcip ? uhcip->uhci_dip : NULL);
1865 }
1866 
1867 
1868 /*
1869  * cb_ops entry points
1870  */
1871 static int
1872 uhci_open(dev_t *devp, int flags, int otyp, cred_t *credp)
1873 {
1874 	dev_info_t *dip = uhci_get_dip(*devp);
1875 
1876 	return (usba_hubdi_open(dip, devp, flags, otyp, credp));
1877 }
1878 
1879 
1880 static int
1881 uhci_close(dev_t dev, int flag, int otyp, cred_t *credp)
1882 {
1883 	dev_info_t *dip = uhci_get_dip(dev);
1884 
1885 	return (usba_hubdi_close(dip, dev, flag, otyp, credp));
1886 }
1887 
1888 
1889 static int
1890 uhci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode,
1891     cred_t *credp, int *rvalp)
1892 {
1893 	dev_info_t *dip = uhci_get_dip(dev);
1894 
1895 	return (usba_hubdi_ioctl(dip, dev, cmd, arg, mode, credp, rvalp));
1896 }
1897