xref: /illumos-gate/usr/src/uts/common/io/mlxcx/mlxcx_gld.c (revision 241c90a06e8d1708235651863df515a2d522a03a)
1 /*
2  * This file and its contents are supplied under the terms of the
3  * Common Development and Distribution License ("CDDL"), version 1.0.
4  * You may only use this file in accordance with the terms of version
5  * 1.0 of the CDDL.
6  *
7  * A full copy of the text of the CDDL should have accompanied this
8  * source.  A copy of the CDDL is also available via the Internet at
9  * http://www.illumos.org/license/CDDL.
10  */
11 
12 /*
13  * Copyright (c) 2020, the University of Queensland
14  * Copyright 2020 RackTop Systems, Inc.
15  */
16 
17 /*
18  * Mellanox Connect-X 4/5/6 driver.
19  */
20 
21 #include <sys/modctl.h>
22 #include <sys/conf.h>
23 #include <sys/devops.h>
24 #include <sys/sysmacros.h>
25 #include <sys/vlan.h>
26 
27 #include <sys/pattr.h>
28 #include <sys/dlpi.h>
29 
30 #include <sys/mac_provider.h>
31 
32 /* Need these for mac_vlan_header_info() */
33 #include <sys/mac_client.h>
34 #include <sys/mac_client_priv.h>
35 
36 #include <mlxcx.h>
37 
38 static char *mlxcx_priv_props[] = {
39 	NULL
40 };
41 
42 #define	MBITS		1000000ULL
43 #define	GBITS		(1000ULL * MBITS)
44 
45 static uint64_t
46 mlxcx_speed_to_bits(mlxcx_eth_proto_t v)
47 {
48 	switch (v) {
49 	case MLXCX_PROTO_SGMII_100BASE:
50 		return (100ULL * MBITS);
51 	case MLXCX_PROTO_SGMII:
52 	case MLXCX_PROTO_1000BASE_KX:
53 		return (1000ULL * MBITS);
54 	case MLXCX_PROTO_10GBASE_CX4:
55 	case MLXCX_PROTO_10GBASE_KX4:
56 	case MLXCX_PROTO_10GBASE_KR:
57 	case MLXCX_PROTO_10GBASE_CR:
58 	case MLXCX_PROTO_10GBASE_SR:
59 	case MLXCX_PROTO_10GBASE_ER_LR:
60 		return (10ULL * GBITS);
61 	case MLXCX_PROTO_40GBASE_CR4:
62 	case MLXCX_PROTO_40GBASE_KR4:
63 	case MLXCX_PROTO_40GBASE_SR4:
64 	case MLXCX_PROTO_40GBASE_LR4_ER4:
65 		return (40ULL * GBITS);
66 	case MLXCX_PROTO_25GBASE_CR:
67 	case MLXCX_PROTO_25GBASE_KR:
68 	case MLXCX_PROTO_25GBASE_SR:
69 		return (25ULL * GBITS);
70 	case MLXCX_PROTO_50GBASE_SR2:
71 	case MLXCX_PROTO_50GBASE_CR2:
72 	case MLXCX_PROTO_50GBASE_KR2:
73 		return (50ULL * GBITS);
74 	case MLXCX_PROTO_100GBASE_CR4:
75 	case MLXCX_PROTO_100GBASE_SR4:
76 	case MLXCX_PROTO_100GBASE_KR4:
77 		return (100ULL * GBITS);
78 	default:
79 		return (0);
80 	}
81 }
82 
83 static int
84 mlxcx_mac_stat_rfc_2863(mlxcx_t *mlxp, mlxcx_port_t *port, uint_t stat,
85     uint64_t *val)
86 {
87 	int ret = 0;
88 	boolean_t ok;
89 	mlxcx_register_data_t data;
90 	mlxcx_ppcnt_rfc_2863_t *st;
91 
92 	ASSERT(mutex_owned(&port->mlp_mtx));
93 
94 	bzero(&data, sizeof (data));
95 	data.mlrd_ppcnt.mlrd_ppcnt_local_port = port->mlp_num + 1;
96 	data.mlrd_ppcnt.mlrd_ppcnt_grp = MLXCX_PPCNT_GRP_RFC_2863;
97 	data.mlrd_ppcnt.mlrd_ppcnt_clear = MLXCX_PPCNT_NO_CLEAR;
98 
99 	ok = mlxcx_cmd_access_register(mlxp, MLXCX_CMD_ACCESS_REGISTER_READ,
100 	    MLXCX_REG_PPCNT, &data);
101 	if (!ok)
102 		return (EIO);
103 	st = &data.mlrd_ppcnt.mlrd_ppcnt_rfc_2863;
104 
105 	switch (stat) {
106 	case MAC_STAT_RBYTES:
107 		*val = from_be64(st->mlppc_rfc_2863_in_octets);
108 		break;
109 	case MAC_STAT_MULTIRCV:
110 		*val = from_be64(st->mlppc_rfc_2863_in_mcast_pkts);
111 		break;
112 	case MAC_STAT_BRDCSTRCV:
113 		*val = from_be64(st->mlppc_rfc_2863_in_bcast_pkts);
114 		break;
115 	case MAC_STAT_MULTIXMT:
116 		*val = from_be64(st->mlppc_rfc_2863_out_mcast_pkts);
117 		break;
118 	case MAC_STAT_BRDCSTXMT:
119 		*val = from_be64(st->mlppc_rfc_2863_out_bcast_pkts);
120 		break;
121 	case MAC_STAT_IERRORS:
122 		*val = from_be64(st->mlppc_rfc_2863_in_errors);
123 		break;
124 	case MAC_STAT_UNKNOWNS:
125 		*val = from_be64(st->mlppc_rfc_2863_in_unknown_protos);
126 		break;
127 	case MAC_STAT_OERRORS:
128 		*val = from_be64(st->mlppc_rfc_2863_out_errors);
129 		break;
130 	case MAC_STAT_OBYTES:
131 		*val = from_be64(st->mlppc_rfc_2863_out_octets);
132 		break;
133 	default:
134 		ret = ENOTSUP;
135 	}
136 
137 	return (ret);
138 }
139 
140 static int
141 mlxcx_mac_stat_ieee_802_3(mlxcx_t *mlxp, mlxcx_port_t *port, uint_t stat,
142     uint64_t *val)
143 {
144 	int ret = 0;
145 	boolean_t ok;
146 	mlxcx_register_data_t data;
147 	mlxcx_ppcnt_ieee_802_3_t *st;
148 
149 	ASSERT(mutex_owned(&port->mlp_mtx));
150 
151 	bzero(&data, sizeof (data));
152 	data.mlrd_ppcnt.mlrd_ppcnt_local_port = port->mlp_num + 1;
153 	data.mlrd_ppcnt.mlrd_ppcnt_grp = MLXCX_PPCNT_GRP_IEEE_802_3;
154 	data.mlrd_ppcnt.mlrd_ppcnt_clear = MLXCX_PPCNT_NO_CLEAR;
155 
156 	ok = mlxcx_cmd_access_register(mlxp, MLXCX_CMD_ACCESS_REGISTER_READ,
157 	    MLXCX_REG_PPCNT, &data);
158 	if (!ok)
159 		return (EIO);
160 	st = &data.mlrd_ppcnt.mlrd_ppcnt_ieee_802_3;
161 
162 	switch (stat) {
163 	case MAC_STAT_IPACKETS:
164 		*val = from_be64(st->mlppc_ieee_802_3_frames_rx);
165 		break;
166 	case MAC_STAT_OPACKETS:
167 		*val = from_be64(st->mlppc_ieee_802_3_frames_tx);
168 		break;
169 	case ETHER_STAT_ALIGN_ERRORS:
170 		*val = from_be64(st->mlppc_ieee_802_3_align_err);
171 		break;
172 	case ETHER_STAT_FCS_ERRORS:
173 		*val = from_be64(st->mlppc_ieee_802_3_fcs_err);
174 		break;
175 	case ETHER_STAT_TOOLONG_ERRORS:
176 		*val = from_be64(st->mlppc_ieee_802_3_frame_too_long_err);
177 		break;
178 	default:
179 		ret = ENOTSUP;
180 	}
181 
182 	return (ret);
183 }
184 
185 static int
186 mlxcx_mac_stat(void *arg, uint_t stat, uint64_t *val)
187 {
188 	mlxcx_t *mlxp = (mlxcx_t *)arg;
189 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
190 	int ret = 0;
191 
192 	mutex_enter(&port->mlp_mtx);
193 
194 	switch (stat) {
195 	case MAC_STAT_IFSPEED:
196 		*val = mlxcx_speed_to_bits(port->mlp_oper_proto);
197 		break;
198 	case ETHER_STAT_LINK_DUPLEX:
199 		*val = LINK_DUPLEX_FULL;
200 		break;
201 	case MAC_STAT_RBYTES:
202 	case MAC_STAT_MULTIRCV:
203 	case MAC_STAT_BRDCSTRCV:
204 	case MAC_STAT_MULTIXMT:
205 	case MAC_STAT_BRDCSTXMT:
206 	case MAC_STAT_IERRORS:
207 	case MAC_STAT_UNKNOWNS:
208 	case MAC_STAT_OERRORS:
209 	case MAC_STAT_OBYTES:
210 		ret = mlxcx_mac_stat_rfc_2863(mlxp, port, stat, val);
211 		break;
212 	case MAC_STAT_IPACKETS:
213 	case MAC_STAT_OPACKETS:
214 	case ETHER_STAT_ALIGN_ERRORS:
215 	case ETHER_STAT_FCS_ERRORS:
216 	case ETHER_STAT_TOOLONG_ERRORS:
217 		ret = mlxcx_mac_stat_ieee_802_3(mlxp, port, stat, val);
218 		break;
219 	case MAC_STAT_NORCVBUF:
220 		*val = port->mlp_stats.mlps_rx_drops;
221 		break;
222 	default:
223 		ret = ENOTSUP;
224 	}
225 
226 	mutex_exit(&port->mlp_mtx);
227 
228 	return (ret);
229 }
230 
231 static int
232 mlxcx_mac_led_set(void *arg, mac_led_mode_t mode, uint_t flags)
233 {
234 	mlxcx_t *mlxp = arg;
235 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
236 	int ret = 0;
237 
238 	if (flags != 0) {
239 		return (EINVAL);
240 	}
241 
242 	mutex_enter(&port->mlp_mtx);
243 
244 	switch (mode) {
245 	case MAC_LED_DEFAULT:
246 	case MAC_LED_OFF:
247 		if (!mlxcx_cmd_set_port_led(mlxp, port, 0)) {
248 			ret = EIO;
249 			break;
250 		}
251 		break;
252 	case MAC_LED_IDENT:
253 		if (!mlxcx_cmd_set_port_led(mlxp, port, UINT16_MAX)) {
254 			ret = EIO;
255 			break;
256 		}
257 		break;
258 	default:
259 		ret = ENOTSUP;
260 	}
261 
262 	mutex_exit(&port->mlp_mtx);
263 
264 	return (ret);
265 }
266 
267 static int
268 mlxcx_mac_txr_info(void *arg, uint_t id, mac_transceiver_info_t *infop)
269 {
270 	mlxcx_t *mlxp = arg;
271 	mlxcx_module_status_t st;
272 
273 	if (!mlxcx_cmd_query_module_status(mlxp, id, &st, NULL))
274 		return (EIO);
275 
276 	if (st != MLXCX_MODULE_UNPLUGGED)
277 		mac_transceiver_info_set_present(infop, B_TRUE);
278 
279 	if (st == MLXCX_MODULE_PLUGGED)
280 		mac_transceiver_info_set_usable(infop, B_TRUE);
281 
282 	return (0);
283 }
284 
285 static int
286 mlxcx_mac_txr_read(void *arg, uint_t id, uint_t page, void *vbuf,
287     size_t nbytes, off_t offset, size_t *nread)
288 {
289 	mlxcx_t *mlxp = arg;
290 	mlxcx_register_data_t data;
291 	uint8_t *buf = vbuf;
292 	boolean_t ok;
293 	size_t take, done = 0;
294 	uint8_t i2c_addr;
295 
296 	if (id != 0 || vbuf == NULL || nbytes == 0 || nread == NULL)
297 		return (EINVAL);
298 
299 	if (nbytes > 256 || offset >= 256 || (offset + nbytes > 256))
300 		return (EINVAL);
301 
302 	/*
303 	 * The PRM is really not very clear about any of this, but it seems
304 	 * that the i2c_device_addr field in MCIA is the SFP+ spec "page"
305 	 * number shifted right by 1 bit. They're written in the SFF spec
306 	 * like "1010000X" so Mellanox just dropped the X.
307 	 *
308 	 * This means that if we want page 0xA0, we put 0x50 in the
309 	 * i2c_device_addr field.
310 	 *
311 	 * The "page_number" field in MCIA means something else. Don't ask me
312 	 * what. FreeBSD leaves it as zero, so we will too!
313 	 */
314 	i2c_addr = page >> 1;
315 
316 	while (done < nbytes) {
317 		take = nbytes - done;
318 		if (take > sizeof (data.mlrd_mcia.mlrd_mcia_data))
319 			take = sizeof (data.mlrd_mcia.mlrd_mcia_data);
320 
321 		bzero(&data, sizeof (data));
322 		ASSERT3U(id, <=, 0xff);
323 		data.mlrd_mcia.mlrd_mcia_module = (uint8_t)id;
324 		data.mlrd_mcia.mlrd_mcia_i2c_device_addr = i2c_addr;
325 		data.mlrd_mcia.mlrd_mcia_device_addr = to_be16(offset);
326 		data.mlrd_mcia.mlrd_mcia_size = to_be16(take);
327 
328 		ok = mlxcx_cmd_access_register(mlxp,
329 		    MLXCX_CMD_ACCESS_REGISTER_READ, MLXCX_REG_MCIA, &data);
330 		if (!ok) {
331 			*nread = 0;
332 			return (EIO);
333 		}
334 
335 		if (data.mlrd_mcia.mlrd_mcia_status != MLXCX_MCIA_STATUS_OK) {
336 			*nread = 0;
337 			return (EIO);
338 		}
339 
340 		bcopy(data.mlrd_mcia.mlrd_mcia_data, &buf[done], take);
341 
342 		done += take;
343 		offset += take;
344 	}
345 	*nread = done;
346 	return (0);
347 }
348 
349 static int
350 mlxcx_mac_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
351 {
352 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh;
353 	(void) wq;
354 
355 	/*
356 	 * We should add support for using hw flow counters and such to
357 	 * get per-ring statistics. Not done yet though!
358 	 */
359 
360 	switch (stat) {
361 	default:
362 		*val = 0;
363 		return (ENOTSUP);
364 	}
365 
366 	return (0);
367 }
368 
369 static int
370 mlxcx_mac_start(void *arg)
371 {
372 	mlxcx_t *mlxp = (mlxcx_t *)arg;
373 	(void) mlxp;
374 	return (0);
375 }
376 
377 static void
378 mlxcx_mac_stop(void *arg)
379 {
380 	mlxcx_t *mlxp = (mlxcx_t *)arg;
381 	(void) mlxp;
382 }
383 
384 static mblk_t *
385 mlxcx_mac_ring_tx(void *arg, mblk_t *mp)
386 {
387 	mlxcx_work_queue_t *sq = (mlxcx_work_queue_t *)arg;
388 	mlxcx_t *mlxp = sq->mlwq_mlx;
389 	mlxcx_completion_queue_t *cq;
390 	mlxcx_buffer_t *b;
391 	mac_header_info_t mhi;
392 	mblk_t *kmp, *nmp;
393 	uint8_t inline_hdrs[MLXCX_MAX_INLINE_HEADERLEN];
394 	size_t inline_hdrlen, rem, off;
395 	uint32_t chkflags = 0;
396 	boolean_t ok;
397 	size_t take = 0;
398 	uint_t bcount;
399 
400 	VERIFY(mp->b_next == NULL);
401 
402 	mac_hcksum_get(mp, NULL, NULL, NULL, NULL, &chkflags);
403 
404 	if (mac_vlan_header_info(mlxp->mlx_mac_hdl, mp, &mhi) != 0) {
405 		/*
406 		 * We got given a frame without a valid L2 header on it. We
407 		 * can't really transmit that (mlx parts don't like it), so
408 		 * we will just drop it on the floor.
409 		 */
410 		freemsg(mp);
411 		return (NULL);
412 	}
413 
414 	inline_hdrlen = rem = mhi.mhi_hdrsize;
415 
416 	kmp = mp;
417 	off = 0;
418 	while (rem > 0) {
419 		const ptrdiff_t sz = MBLKL(kmp);
420 		ASSERT3S(sz, >=, 0);
421 		ASSERT3U(sz, <=, SIZE_MAX);
422 		take = sz;
423 		if (take > rem)
424 			take = rem;
425 		bcopy(kmp->b_rptr, inline_hdrs + off, take);
426 		rem -= take;
427 		off += take;
428 		if (take == sz) {
429 			take = 0;
430 			kmp = kmp->b_cont;
431 		}
432 	}
433 
434 	bcount = mlxcx_buf_bind_or_copy(mlxp, sq, kmp, take, &b);
435 	if (bcount == 0) {
436 		atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC);
437 		return (mp);
438 	}
439 
440 	mutex_enter(&sq->mlwq_mtx);
441 	VERIFY3U(sq->mlwq_inline_mode, <=, MLXCX_ETH_INLINE_L2);
442 	cq = sq->mlwq_cq;
443 
444 	/*
445 	 * state is a single int, so read-only access without the CQ lock
446 	 * should be fine.
447 	 */
448 	if (cq->mlcq_state & MLXCX_CQ_TEARDOWN) {
449 		mutex_exit(&sq->mlwq_mtx);
450 		mlxcx_buf_return_chain(mlxp, b, B_FALSE);
451 		return (NULL);
452 	}
453 
454 	if ((sq->mlwq_state & (MLXCX_WQ_TEARDOWN | MLXCX_WQ_STARTED)) !=
455 	    MLXCX_WQ_STARTED) {
456 		mutex_exit(&sq->mlwq_mtx);
457 		mlxcx_buf_return_chain(mlxp, b, B_FALSE);
458 		return (NULL);
459 	}
460 
461 	/*
462 	 * If the completion queue buffer count is already at or above
463 	 * the high water mark, or the addition of this new chain will
464 	 * exceed the CQ ring size, then indicate we are blocked.
465 	 */
466 	if (cq->mlcq_bufcnt >= cq->mlcq_bufhwm ||
467 	    (cq->mlcq_bufcnt + bcount) > cq->mlcq_nents) {
468 		atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_BLOCKED_MAC);
469 		goto blocked;
470 	}
471 
472 	if (sq->mlwq_wqebb_used >= sq->mlwq_bufhwm) {
473 		atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC);
474 		goto blocked;
475 	}
476 
477 	ok = mlxcx_sq_add_buffer(mlxp, sq, inline_hdrs, inline_hdrlen,
478 	    chkflags, b);
479 	if (!ok) {
480 		atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_BLOCKED_MAC);
481 		atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC);
482 		goto blocked;
483 	}
484 
485 	/*
486 	 * Now that we've successfully enqueued the rest of the packet,
487 	 * free any mblks that we cut off while inlining headers.
488 	 */
489 	for (; mp != kmp; mp = nmp) {
490 		nmp = mp->b_cont;
491 		freeb(mp);
492 	}
493 
494 	mutex_exit(&sq->mlwq_mtx);
495 
496 	return (NULL);
497 
498 blocked:
499 	mutex_exit(&sq->mlwq_mtx);
500 	mlxcx_buf_return_chain(mlxp, b, B_TRUE);
501 	return (mp);
502 }
503 
504 static int
505 mlxcx_mac_setpromisc(void *arg, boolean_t on)
506 {
507 	mlxcx_t *mlxp = (mlxcx_t *)arg;
508 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
509 	mlxcx_flow_group_t *fg;
510 	mlxcx_flow_entry_t *fe;
511 	mlxcx_flow_table_t *ft;
512 	mlxcx_ring_group_t *g;
513 	int ret = 0;
514 	uint_t idx;
515 
516 	mutex_enter(&port->mlp_mtx);
517 
518 	/*
519 	 * First, do the top-level flow entry on the root flow table for
520 	 * the port. This catches all traffic that doesn't match any MAC
521 	 * MAC filters.
522 	 */
523 	ft = port->mlp_rx_flow;
524 	mutex_enter(&ft->mlft_mtx);
525 	fg = port->mlp_promisc;
526 	fe = list_head(&fg->mlfg_entries);
527 	if (on && !(fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
528 		if (!mlxcx_cmd_set_flow_table_entry(mlxp, fe)) {
529 			ret = EIO;
530 		}
531 	} else if (!on && (fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
532 		if (!mlxcx_cmd_delete_flow_table_entry(mlxp, fe)) {
533 			ret = EIO;
534 		}
535 	}
536 	mutex_exit(&ft->mlft_mtx);
537 
538 	/*
539 	 * If we failed to change the top-level entry, don't bother with
540 	 * trying the per-group ones.
541 	 */
542 	if (ret != 0) {
543 		mutex_exit(&port->mlp_mtx);
544 		return (ret);
545 	}
546 
547 	/*
548 	 * Then, do the per-rx-group flow entries which catch traffic that
549 	 * matched a MAC filter but failed to match a VLAN filter.
550 	 */
551 	for (idx = 0; idx < mlxp->mlx_rx_ngroups; ++idx) {
552 		g = &mlxp->mlx_rx_groups[idx];
553 
554 		mutex_enter(&g->mlg_mtx);
555 
556 		ft = g->mlg_rx_vlan_ft;
557 		mutex_enter(&ft->mlft_mtx);
558 
559 		fg = g->mlg_rx_vlan_promisc_fg;
560 		fe = list_head(&fg->mlfg_entries);
561 		if (on && !(fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
562 			if (!mlxcx_cmd_set_flow_table_entry(mlxp, fe)) {
563 				ret = EIO;
564 			}
565 		} else if (!on && (fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) {
566 			if (!mlxcx_cmd_delete_flow_table_entry(mlxp, fe)) {
567 				ret = EIO;
568 			}
569 		}
570 
571 		mutex_exit(&ft->mlft_mtx);
572 		mutex_exit(&g->mlg_mtx);
573 	}
574 
575 	mutex_exit(&port->mlp_mtx);
576 	return (ret);
577 }
578 
579 static int
580 mlxcx_mac_multicast(void *arg, boolean_t add, const uint8_t *addr)
581 {
582 	mlxcx_t *mlxp = (mlxcx_t *)arg;
583 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
584 	mlxcx_ring_group_t *g = &mlxp->mlx_rx_groups[0];
585 	int ret = 0;
586 
587 	mutex_enter(&port->mlp_mtx);
588 	mutex_enter(&g->mlg_mtx);
589 	if (add) {
590 		if (!mlxcx_add_umcast_entry(mlxp, port, g, addr)) {
591 			ret = EIO;
592 		}
593 	} else {
594 		if (!mlxcx_remove_umcast_entry(mlxp, port, g, addr)) {
595 			ret = EIO;
596 		}
597 	}
598 	mutex_exit(&g->mlg_mtx);
599 	mutex_exit(&port->mlp_mtx);
600 	return (ret);
601 }
602 
603 static int
604 mlxcx_group_add_mac(void *arg, const uint8_t *mac_addr)
605 {
606 	mlxcx_ring_group_t *g = arg;
607 	mlxcx_t *mlxp = g->mlg_mlx;
608 	mlxcx_port_t *port = g->mlg_port;
609 	int ret = 0;
610 
611 	mutex_enter(&port->mlp_mtx);
612 	mutex_enter(&g->mlg_mtx);
613 	if (!mlxcx_add_umcast_entry(mlxp, port, g, mac_addr)) {
614 		ret = EIO;
615 	}
616 	mutex_exit(&g->mlg_mtx);
617 	mutex_exit(&port->mlp_mtx);
618 
619 	return (ret);
620 }
621 
622 /*
623  * Support for VLAN steering into groups is not yet available in upstream
624  * illumos.
625  */
626 #if defined(MAC_VLAN_UNTAGGED)
627 
628 static int
629 mlxcx_group_add_vlan(mac_group_driver_t gh, uint16_t vid)
630 {
631 	mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh;
632 	mlxcx_t *mlxp = g->mlg_mlx;
633 	int ret = 0;
634 	boolean_t tagged = B_TRUE;
635 
636 	if (vid == MAC_VLAN_UNTAGGED) {
637 		vid = 0;
638 		tagged = B_FALSE;
639 	}
640 
641 	mutex_enter(&g->mlg_mtx);
642 	if (!mlxcx_add_vlan_entry(mlxp, g, tagged, vid)) {
643 		ret = EIO;
644 	}
645 	mutex_exit(&g->mlg_mtx);
646 
647 	return (ret);
648 }
649 
650 static int
651 mlxcx_group_remove_vlan(mac_group_driver_t gh, uint16_t vid)
652 {
653 	mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh;
654 	mlxcx_t *mlxp = g->mlg_mlx;
655 	int ret = 0;
656 	boolean_t tagged = B_TRUE;
657 
658 	if (vid == MAC_VLAN_UNTAGGED) {
659 		vid = 0;
660 		tagged = B_FALSE;
661 	}
662 
663 	mutex_enter(&g->mlg_mtx);
664 	if (!mlxcx_remove_vlan_entry(mlxp, g, tagged, vid)) {
665 		ret = EIO;
666 	}
667 	mutex_exit(&g->mlg_mtx);
668 
669 	return (ret);
670 }
671 
672 #endif /* MAC_VLAN_UNTAGGED */
673 
674 static int
675 mlxcx_group_remove_mac(void *arg, const uint8_t *mac_addr)
676 {
677 	mlxcx_ring_group_t *g = arg;
678 	mlxcx_t *mlxp = g->mlg_mlx;
679 	mlxcx_port_t *port = g->mlg_port;
680 	int ret = 0;
681 
682 	mutex_enter(&port->mlp_mtx);
683 	mutex_enter(&g->mlg_mtx);
684 	if (!mlxcx_remove_umcast_entry(mlxp, port, g, mac_addr)) {
685 		ret = EIO;
686 	}
687 	mutex_exit(&g->mlg_mtx);
688 	mutex_exit(&port->mlp_mtx);
689 
690 	return (ret);
691 }
692 
693 static int
694 mlxcx_mac_ring_start(mac_ring_driver_t rh, uint64_t gen_num)
695 {
696 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh;
697 	mlxcx_completion_queue_t *cq = wq->mlwq_cq;
698 	mlxcx_ring_group_t *g = wq->mlwq_group;
699 	mlxcx_t *mlxp = wq->mlwq_mlx;
700 
701 	ASSERT(cq != NULL);
702 	ASSERT(g != NULL);
703 
704 	ASSERT(wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ ||
705 	    wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ);
706 	if (wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ &&
707 	    !mlxcx_tx_ring_start(mlxp, g, wq))
708 		return (EIO);
709 	if (wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ &&
710 	    !mlxcx_rx_ring_start(mlxp, g, wq))
711 		return (EIO);
712 
713 	mutex_enter(&cq->mlcq_mtx);
714 	cq->mlcq_mac_gen = gen_num;
715 	mutex_exit(&cq->mlcq_mtx);
716 
717 	return (0);
718 }
719 
720 static void
721 mlxcx_mac_ring_stop(mac_ring_driver_t rh)
722 {
723 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh;
724 	mlxcx_completion_queue_t *cq = wq->mlwq_cq;
725 	mlxcx_t *mlxp = wq->mlwq_mlx;
726 	mlxcx_buf_shard_t *s;
727 	mlxcx_buffer_t *buf;
728 
729 	/*
730 	 * To prevent deadlocks and sleeping whilst holding either the
731 	 * CQ mutex or WQ mutex, we split the stop processing into two
732 	 * parts.
733 	 *
734 	 * With the CQ amd WQ mutexes held the appropriate WQ is stopped.
735 	 * The Q in the HCA is set to Reset state and flagged as no
736 	 * longer started. Atomic with changing this WQ state, the buffer
737 	 * shards are flagged as draining.
738 	 *
739 	 * Now, any requests for buffers and attempts to submit messages
740 	 * will fail and once we're in this state it is safe to relinquish
741 	 * the CQ and WQ mutexes. Allowing us to complete the ring stop
742 	 * by waiting for the buffer lists, with the exception of
743 	 * the loaned list, to drain. Buffers on the loaned list are
744 	 * not under our control, we will get them back when the mblk tied
745 	 * to the buffer is freed.
746 	 */
747 
748 	mutex_enter(&cq->mlcq_mtx);
749 	mutex_enter(&wq->mlwq_mtx);
750 
751 	if (wq->mlwq_state & MLXCX_WQ_STARTED) {
752 		if (wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ &&
753 		    !mlxcx_cmd_stop_rq(mlxp, wq)) {
754 			mutex_exit(&wq->mlwq_mtx);
755 			mutex_exit(&cq->mlcq_mtx);
756 			return;
757 		}
758 		if (wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ &&
759 		    !mlxcx_cmd_stop_sq(mlxp, wq)) {
760 			mutex_exit(&wq->mlwq_mtx);
761 			mutex_exit(&cq->mlcq_mtx);
762 			return;
763 		}
764 	}
765 	ASSERT0(wq->mlwq_state & MLXCX_WQ_STARTED);
766 
767 	mlxcx_shard_draining(wq->mlwq_bufs);
768 	if (wq->mlwq_foreign_bufs != NULL)
769 		mlxcx_shard_draining(wq->mlwq_foreign_bufs);
770 
771 
772 	if (wq->mlwq_state & MLXCX_WQ_BUFFERS) {
773 		mutex_exit(&wq->mlwq_mtx);
774 		mutex_exit(&cq->mlcq_mtx);
775 
776 		/* Return any outstanding buffers to the free pool. */
777 		while ((buf = list_remove_head(&cq->mlcq_buffers)) != NULL) {
778 			mlxcx_buf_return_chain(mlxp, buf, B_FALSE);
779 		}
780 		mutex_enter(&cq->mlcq_bufbmtx);
781 		while ((buf = list_remove_head(&cq->mlcq_buffers_b)) != NULL) {
782 			mlxcx_buf_return_chain(mlxp, buf, B_FALSE);
783 		}
784 		mutex_exit(&cq->mlcq_bufbmtx);
785 		cq->mlcq_bufcnt = 0;
786 
787 		s = wq->mlwq_bufs;
788 		mutex_enter(&s->mlbs_mtx);
789 		while (!list_is_empty(&s->mlbs_busy))
790 			cv_wait(&s->mlbs_free_nonempty, &s->mlbs_mtx);
791 		while ((buf = list_head(&s->mlbs_free)) != NULL) {
792 			mlxcx_buf_destroy(mlxp, buf);
793 		}
794 		mutex_exit(&s->mlbs_mtx);
795 
796 		s = wq->mlwq_foreign_bufs;
797 		if (s != NULL) {
798 			mutex_enter(&s->mlbs_mtx);
799 			while (!list_is_empty(&s->mlbs_busy))
800 				cv_wait(&s->mlbs_free_nonempty, &s->mlbs_mtx);
801 			while ((buf = list_head(&s->mlbs_free)) != NULL) {
802 				mlxcx_buf_destroy(mlxp, buf);
803 			}
804 			mutex_exit(&s->mlbs_mtx);
805 		}
806 
807 		mutex_enter(&wq->mlwq_mtx);
808 		wq->mlwq_state &= ~MLXCX_WQ_BUFFERS;
809 		mutex_exit(&wq->mlwq_mtx);
810 	} else {
811 		mutex_exit(&wq->mlwq_mtx);
812 		mutex_exit(&cq->mlcq_mtx);
813 	}
814 }
815 
816 static int
817 mlxcx_mac_group_start(mac_group_driver_t gh)
818 {
819 	mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh;
820 	mlxcx_t *mlxp = g->mlg_mlx;
821 
822 	VERIFY3S(g->mlg_type, ==, MLXCX_GROUP_RX);
823 	ASSERT(mlxp != NULL);
824 
825 	if (g->mlg_state & MLXCX_GROUP_RUNNING)
826 		return (0);
827 
828 	if (!mlxcx_rx_group_start(mlxp, g))
829 		return (EIO);
830 
831 	return (0);
832 }
833 
834 static void
835 mlxcx_mac_fill_tx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
836     const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
837 {
838 	mlxcx_t *mlxp = (mlxcx_t *)arg;
839 	mlxcx_ring_group_t *g;
840 	mlxcx_work_queue_t *wq;
841 	mac_intr_t *mintr = &infop->mri_intr;
842 
843 	if (rtype != MAC_RING_TYPE_TX)
844 		return;
845 	ASSERT3S(group_index, ==, -1);
846 
847 	g = &mlxp->mlx_tx_groups[0];
848 	ASSERT(g->mlg_state & MLXCX_GROUP_INIT);
849 	mutex_enter(&g->mlg_mtx);
850 
851 	ASSERT3S(ring_index, >=, 0);
852 	ASSERT3S(ring_index, <, g->mlg_nwqs);
853 
854 	wq = &g->mlg_wqs[ring_index];
855 
856 	wq->mlwq_cq->mlcq_mac_hdl = rh;
857 
858 	infop->mri_driver = (mac_ring_driver_t)wq;
859 	infop->mri_start = mlxcx_mac_ring_start;
860 	infop->mri_stop = mlxcx_mac_ring_stop;
861 	infop->mri_tx = mlxcx_mac_ring_tx;
862 	infop->mri_stat = mlxcx_mac_ring_stat;
863 
864 	mintr->mi_ddi_handle = mlxp->mlx_intr_handles[
865 	    wq->mlwq_cq->mlcq_eq->mleq_intr_index];
866 
867 	mutex_exit(&g->mlg_mtx);
868 }
869 
870 static int
871 mlxcx_mac_ring_intr_enable(mac_intr_handle_t intrh)
872 {
873 	mlxcx_completion_queue_t *cq = (mlxcx_completion_queue_t *)intrh;
874 	mlxcx_event_queue_t *eq = cq->mlcq_eq;
875 	mlxcx_t *mlxp = cq->mlcq_mlx;
876 
877 	/*
878 	 * We are going to call mlxcx_arm_cq() here, so we take the EQ lock
879 	 * as well as the CQ one to make sure we don't race against
880 	 * mlxcx_intr_n().
881 	 */
882 	mutex_enter(&eq->mleq_mtx);
883 	mutex_enter(&cq->mlcq_mtx);
884 	if (cq->mlcq_state & MLXCX_CQ_POLLING) {
885 		cq->mlcq_state &= ~MLXCX_CQ_POLLING;
886 		if (!(cq->mlcq_state & MLXCX_CQ_ARMED))
887 			mlxcx_arm_cq(mlxp, cq);
888 	}
889 	mutex_exit(&cq->mlcq_mtx);
890 	mutex_exit(&eq->mleq_mtx);
891 
892 	return (0);
893 }
894 
895 static int
896 mlxcx_mac_ring_intr_disable(mac_intr_handle_t intrh)
897 {
898 	mlxcx_completion_queue_t *cq = (mlxcx_completion_queue_t *)intrh;
899 
900 	mutex_enter(&cq->mlcq_mtx);
901 	atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_POLLING);
902 	mutex_exit(&cq->mlcq_mtx);
903 
904 	return (0);
905 }
906 
907 static mblk_t *
908 mlxcx_mac_ring_rx_poll(void *arg, int poll_bytes)
909 {
910 	mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)arg;
911 	mlxcx_completion_queue_t *cq = wq->mlwq_cq;
912 	mlxcx_t *mlxp = wq->mlwq_mlx;
913 	mblk_t *mp;
914 
915 	ASSERT(cq != NULL);
916 	ASSERT3S(poll_bytes, >, 0);
917 	if (poll_bytes == 0)
918 		return (NULL);
919 
920 	mutex_enter(&cq->mlcq_mtx);
921 	mp = mlxcx_rx_poll(mlxp, cq, poll_bytes);
922 	mutex_exit(&cq->mlcq_mtx);
923 
924 	return (mp);
925 }
926 
927 static void
928 mlxcx_mac_fill_rx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
929     const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
930 {
931 	mlxcx_t *mlxp = (mlxcx_t *)arg;
932 	mlxcx_ring_group_t *g;
933 	mlxcx_work_queue_t *wq;
934 	mac_intr_t *mintr = &infop->mri_intr;
935 
936 	if (rtype != MAC_RING_TYPE_RX)
937 		return;
938 	ASSERT3S(group_index, >=, 0);
939 	ASSERT3S(group_index, <, mlxp->mlx_rx_ngroups);
940 
941 	g = &mlxp->mlx_rx_groups[group_index];
942 	ASSERT(g->mlg_state & MLXCX_GROUP_INIT);
943 	mutex_enter(&g->mlg_mtx);
944 
945 	ASSERT3S(ring_index, >=, 0);
946 	ASSERT3S(ring_index, <, g->mlg_nwqs);
947 
948 	ASSERT(g->mlg_state & MLXCX_GROUP_WQS);
949 	wq = &g->mlg_wqs[ring_index];
950 
951 	wq->mlwq_cq->mlcq_mac_hdl = rh;
952 
953 	infop->mri_driver = (mac_ring_driver_t)wq;
954 	infop->mri_start = mlxcx_mac_ring_start;
955 	infop->mri_stop = mlxcx_mac_ring_stop;
956 	infop->mri_poll = mlxcx_mac_ring_rx_poll;
957 	infop->mri_stat = mlxcx_mac_ring_stat;
958 
959 	mintr->mi_handle = (mac_intr_handle_t)wq->mlwq_cq;
960 	mintr->mi_enable = mlxcx_mac_ring_intr_enable;
961 	mintr->mi_disable = mlxcx_mac_ring_intr_disable;
962 
963 	mintr->mi_ddi_handle = mlxp->mlx_intr_handles[
964 	    wq->mlwq_cq->mlcq_eq->mleq_intr_index];
965 
966 	mutex_exit(&g->mlg_mtx);
967 }
968 
969 static void
970 mlxcx_mac_fill_rx_group(void *arg, mac_ring_type_t rtype, const int index,
971     mac_group_info_t *infop, mac_group_handle_t gh)
972 {
973 	mlxcx_t *mlxp = (mlxcx_t *)arg;
974 	mlxcx_ring_group_t *g;
975 
976 	if (rtype != MAC_RING_TYPE_RX)
977 		return;
978 
979 	ASSERT3S(index, >=, 0);
980 	ASSERT3S(index, <, mlxp->mlx_rx_ngroups);
981 	g = &mlxp->mlx_rx_groups[index];
982 	ASSERT(g->mlg_state & MLXCX_GROUP_INIT);
983 
984 	g->mlg_mac_hdl = gh;
985 
986 	infop->mgi_driver = (mac_group_driver_t)g;
987 	infop->mgi_start = mlxcx_mac_group_start;
988 	infop->mgi_stop = NULL;
989 	infop->mgi_addmac = mlxcx_group_add_mac;
990 	infop->mgi_remmac = mlxcx_group_remove_mac;
991 #if defined(MAC_VLAN_UNTAGGED)
992 	infop->mgi_addvlan = mlxcx_group_add_vlan;
993 	infop->mgi_remvlan = mlxcx_group_remove_vlan;
994 #endif /* MAC_VLAN_UNTAGGED */
995 
996 	infop->mgi_count = g->mlg_nwqs;
997 }
998 
999 static boolean_t
1000 mlxcx_mac_getcapab(void *arg, mac_capab_t cap, void *cap_data)
1001 {
1002 	mlxcx_t *mlxp = (mlxcx_t *)arg;
1003 	mac_capab_rings_t *cap_rings;
1004 	mac_capab_led_t *cap_leds;
1005 	mac_capab_transceiver_t *cap_txr;
1006 	uint_t i, n = 0;
1007 
1008 	switch (cap) {
1009 
1010 	case MAC_CAPAB_RINGS:
1011 		cap_rings = cap_data;
1012 		cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC;
1013 		switch (cap_rings->mr_type) {
1014 		case MAC_RING_TYPE_TX:
1015 			cap_rings->mr_gnum = 0;
1016 			cap_rings->mr_rnum = mlxp->mlx_tx_groups[0].mlg_nwqs;
1017 			cap_rings->mr_rget = mlxcx_mac_fill_tx_ring;
1018 			cap_rings->mr_gget = NULL;
1019 			cap_rings->mr_gaddring = NULL;
1020 			cap_rings->mr_gremring = NULL;
1021 			break;
1022 		case MAC_RING_TYPE_RX:
1023 			cap_rings->mr_gnum = mlxp->mlx_rx_ngroups;
1024 			for (i = 0; i < mlxp->mlx_rx_ngroups; ++i)
1025 				n += mlxp->mlx_rx_groups[i].mlg_nwqs;
1026 			cap_rings->mr_rnum = n;
1027 			cap_rings->mr_rget = mlxcx_mac_fill_rx_ring;
1028 			cap_rings->mr_gget = mlxcx_mac_fill_rx_group;
1029 			cap_rings->mr_gaddring = NULL;
1030 			cap_rings->mr_gremring = NULL;
1031 			break;
1032 		default:
1033 			return (B_FALSE);
1034 		}
1035 		break;
1036 
1037 	case MAC_CAPAB_HCKSUM:
1038 		if (mlxp->mlx_caps->mlc_checksum) {
1039 			*(uint32_t *)cap_data = HCKSUM_INET_FULL_V4 |
1040 			    HCKSUM_INET_FULL_V6 | HCKSUM_IPHDRCKSUM;
1041 		}
1042 		break;
1043 
1044 	case MAC_CAPAB_LED:
1045 		cap_leds = cap_data;
1046 
1047 		cap_leds->mcl_flags = 0;
1048 		cap_leds->mcl_modes = MAC_LED_DEFAULT | MAC_LED_OFF |
1049 		    MAC_LED_IDENT;
1050 		cap_leds->mcl_set = mlxcx_mac_led_set;
1051 		break;
1052 
1053 	case MAC_CAPAB_TRANSCEIVER:
1054 		cap_txr = cap_data;
1055 
1056 		cap_txr->mct_flags = 0;
1057 		cap_txr->mct_ntransceivers = 1;
1058 		cap_txr->mct_info = mlxcx_mac_txr_info;
1059 		cap_txr->mct_read = mlxcx_mac_txr_read;
1060 		break;
1061 
1062 	default:
1063 		return (B_FALSE);
1064 	}
1065 
1066 	return (B_TRUE);
1067 }
1068 
1069 static void
1070 mlxcx_mac_propinfo(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1071     mac_prop_info_handle_t prh)
1072 {
1073 	mlxcx_t *mlxp = (mlxcx_t *)arg;
1074 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
1075 
1076 	mutex_enter(&port->mlp_mtx);
1077 
1078 	switch (pr_num) {
1079 	case MAC_PROP_DUPLEX:
1080 	case MAC_PROP_SPEED:
1081 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1082 		break;
1083 	case MAC_PROP_MTU:
1084 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
1085 		mac_prop_info_set_range_uint32(prh, MLXCX_MTU_OFFSET,
1086 		    port->mlp_max_mtu);
1087 		mac_prop_info_set_default_uint32(prh,
1088 		    port->mlp_mtu - MLXCX_MTU_OFFSET);
1089 		break;
1090 	case MAC_PROP_AUTONEG:
1091 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1092 		mac_prop_info_set_default_uint8(prh, 1);
1093 		break;
1094 	case MAC_PROP_ADV_100GFDX_CAP:
1095 	case MAC_PROP_EN_100GFDX_CAP:
1096 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1097 		mac_prop_info_set_default_uint8(prh,
1098 		    (port->mlp_oper_proto & MLXCX_PROTO_100G) != 0);
1099 		break;
1100 	case MAC_PROP_ADV_50GFDX_CAP:
1101 	case MAC_PROP_EN_50GFDX_CAP:
1102 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1103 		mac_prop_info_set_default_uint8(prh,
1104 		    (port->mlp_oper_proto & MLXCX_PROTO_50G) != 0);
1105 		break;
1106 	case MAC_PROP_ADV_40GFDX_CAP:
1107 	case MAC_PROP_EN_40GFDX_CAP:
1108 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1109 		mac_prop_info_set_default_uint8(prh,
1110 		    (port->mlp_oper_proto & MLXCX_PROTO_40G) != 0);
1111 		break;
1112 	case MAC_PROP_ADV_25GFDX_CAP:
1113 	case MAC_PROP_EN_25GFDX_CAP:
1114 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1115 		mac_prop_info_set_default_uint8(prh,
1116 		    (port->mlp_oper_proto & MLXCX_PROTO_25G) != 0);
1117 		break;
1118 	case MAC_PROP_ADV_10GFDX_CAP:
1119 	case MAC_PROP_EN_10GFDX_CAP:
1120 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1121 		mac_prop_info_set_default_uint8(prh,
1122 		    (port->mlp_oper_proto & MLXCX_PROTO_10G) != 0);
1123 		break;
1124 	case MAC_PROP_ADV_1000FDX_CAP:
1125 	case MAC_PROP_EN_1000FDX_CAP:
1126 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1127 		mac_prop_info_set_default_uint8(prh,
1128 		    (port->mlp_oper_proto & MLXCX_PROTO_1G) != 0);
1129 		break;
1130 	case MAC_PROP_ADV_100FDX_CAP:
1131 	case MAC_PROP_EN_100FDX_CAP:
1132 		mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1133 		mac_prop_info_set_default_uint8(prh,
1134 		    (port->mlp_oper_proto & MLXCX_PROTO_100M) != 0);
1135 		break;
1136 	default:
1137 		break;
1138 	}
1139 
1140 	mutex_exit(&port->mlp_mtx);
1141 }
1142 
1143 static int
1144 mlxcx_mac_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1145     uint_t pr_valsize, const void *pr_val)
1146 {
1147 	mlxcx_t *mlxp = (mlxcx_t *)arg;
1148 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
1149 	int ret = 0;
1150 	uint32_t new_mtu, new_hw_mtu, old_mtu;
1151 	mlxcx_buf_shard_t *sh;
1152 	boolean_t allocd = B_FALSE;
1153 
1154 	mutex_enter(&port->mlp_mtx);
1155 
1156 	switch (pr_num) {
1157 	case MAC_PROP_MTU:
1158 		bcopy(pr_val, &new_mtu, sizeof (new_mtu));
1159 		new_hw_mtu = new_mtu + MLXCX_MTU_OFFSET;
1160 		if (new_hw_mtu == port->mlp_mtu)
1161 			break;
1162 		if (new_hw_mtu > port->mlp_max_mtu) {
1163 			ret = EINVAL;
1164 			break;
1165 		}
1166 		sh = list_head(&mlxp->mlx_buf_shards);
1167 		for (; sh != NULL; sh = list_next(&mlxp->mlx_buf_shards, sh)) {
1168 			mutex_enter(&sh->mlbs_mtx);
1169 			if (!list_is_empty(&sh->mlbs_free) ||
1170 			    !list_is_empty(&sh->mlbs_busy) ||
1171 			    !list_is_empty(&sh->mlbs_loaned)) {
1172 				allocd = B_TRUE;
1173 				mutex_exit(&sh->mlbs_mtx);
1174 				break;
1175 			}
1176 			mutex_exit(&sh->mlbs_mtx);
1177 		}
1178 		if (allocd) {
1179 			ret = EBUSY;
1180 			break;
1181 		}
1182 		old_mtu = port->mlp_mtu;
1183 		ret = mac_maxsdu_update(mlxp->mlx_mac_hdl, new_mtu);
1184 		if (ret != 0)
1185 			break;
1186 		port->mlp_mtu = new_hw_mtu;
1187 		if (!mlxcx_cmd_modify_nic_vport_ctx(mlxp, port,
1188 		    MLXCX_MODIFY_NIC_VPORT_CTX_MTU)) {
1189 			port->mlp_mtu = old_mtu;
1190 			(void) mac_maxsdu_update(mlxp->mlx_mac_hdl, old_mtu);
1191 			ret = EIO;
1192 			break;
1193 		}
1194 		if (!mlxcx_cmd_set_port_mtu(mlxp, port)) {
1195 			port->mlp_mtu = old_mtu;
1196 			(void) mac_maxsdu_update(mlxp->mlx_mac_hdl, old_mtu);
1197 			ret = EIO;
1198 			break;
1199 		}
1200 		break;
1201 	default:
1202 		ret = ENOTSUP;
1203 		break;
1204 	}
1205 
1206 	mutex_exit(&port->mlp_mtx);
1207 
1208 	return (ret);
1209 }
1210 
1211 static int
1212 mlxcx_mac_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1213     uint_t pr_valsize, void *pr_val)
1214 {
1215 	mlxcx_t *mlxp = (mlxcx_t *)arg;
1216 	mlxcx_port_t *port = &mlxp->mlx_ports[0];
1217 	uint64_t speed;
1218 	int ret = 0;
1219 
1220 	mutex_enter(&port->mlp_mtx);
1221 
1222 	switch (pr_num) {
1223 	case MAC_PROP_DUPLEX:
1224 		if (pr_valsize < sizeof (link_duplex_t)) {
1225 			ret = EOVERFLOW;
1226 			break;
1227 		}
1228 		/* connectx parts only support full duplex */
1229 		*(link_duplex_t *)pr_val = LINK_DUPLEX_FULL;
1230 		break;
1231 	case MAC_PROP_SPEED:
1232 		if (pr_valsize < sizeof (uint64_t)) {
1233 			ret = EOVERFLOW;
1234 			break;
1235 		}
1236 		speed = mlxcx_speed_to_bits(port->mlp_oper_proto);
1237 		bcopy(&speed, pr_val, sizeof (speed));
1238 		break;
1239 	case MAC_PROP_STATUS:
1240 		if (pr_valsize < sizeof (link_state_t)) {
1241 			ret = EOVERFLOW;
1242 			break;
1243 		}
1244 		switch (port->mlp_oper_status) {
1245 		case MLXCX_PORT_STATUS_UP:
1246 		case MLXCX_PORT_STATUS_UP_ONCE:
1247 			*(link_state_t *)pr_val = LINK_STATE_UP;
1248 			break;
1249 		case MLXCX_PORT_STATUS_DOWN:
1250 			*(link_state_t *)pr_val = LINK_STATE_DOWN;
1251 			break;
1252 		default:
1253 			*(link_state_t *)pr_val = LINK_STATE_UNKNOWN;
1254 		}
1255 		break;
1256 	case MAC_PROP_AUTONEG:
1257 		if (pr_valsize < sizeof (uint8_t)) {
1258 			ret = EOVERFLOW;
1259 			break;
1260 		}
1261 		*(uint8_t *)pr_val = port->mlp_autoneg;
1262 		break;
1263 	case MAC_PROP_MTU:
1264 		if (pr_valsize < sizeof (uint32_t)) {
1265 			ret = EOVERFLOW;
1266 			break;
1267 		}
1268 		*(uint32_t *)pr_val = port->mlp_mtu - MLXCX_MTU_OFFSET;
1269 		break;
1270 	case MAC_PROP_ADV_100GFDX_CAP:
1271 	case MAC_PROP_EN_100GFDX_CAP:
1272 		if (pr_valsize < sizeof (uint8_t)) {
1273 			ret = EOVERFLOW;
1274 			break;
1275 		}
1276 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1277 		    MLXCX_PROTO_100G) != 0;
1278 		break;
1279 	case MAC_PROP_ADV_50GFDX_CAP:
1280 	case MAC_PROP_EN_50GFDX_CAP:
1281 		if (pr_valsize < sizeof (uint8_t)) {
1282 			ret = EOVERFLOW;
1283 			break;
1284 		}
1285 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1286 		    MLXCX_PROTO_50G) != 0;
1287 		break;
1288 	case MAC_PROP_ADV_40GFDX_CAP:
1289 	case MAC_PROP_EN_40GFDX_CAP:
1290 		if (pr_valsize < sizeof (uint8_t)) {
1291 			ret = EOVERFLOW;
1292 			break;
1293 		}
1294 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1295 		    MLXCX_PROTO_40G) != 0;
1296 		break;
1297 	case MAC_PROP_ADV_25GFDX_CAP:
1298 	case MAC_PROP_EN_25GFDX_CAP:
1299 		if (pr_valsize < sizeof (uint8_t)) {
1300 			ret = EOVERFLOW;
1301 			break;
1302 		}
1303 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1304 		    MLXCX_PROTO_25G) != 0;
1305 		break;
1306 	case MAC_PROP_ADV_10GFDX_CAP:
1307 	case MAC_PROP_EN_10GFDX_CAP:
1308 		if (pr_valsize < sizeof (uint8_t)) {
1309 			ret = EOVERFLOW;
1310 			break;
1311 		}
1312 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1313 		    MLXCX_PROTO_10G) != 0;
1314 		break;
1315 	case MAC_PROP_ADV_1000FDX_CAP:
1316 	case MAC_PROP_EN_1000FDX_CAP:
1317 		if (pr_valsize < sizeof (uint8_t)) {
1318 			ret = EOVERFLOW;
1319 			break;
1320 		}
1321 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1322 		    MLXCX_PROTO_1G) != 0;
1323 		break;
1324 	case MAC_PROP_ADV_100FDX_CAP:
1325 	case MAC_PROP_EN_100FDX_CAP:
1326 		if (pr_valsize < sizeof (uint8_t)) {
1327 			ret = EOVERFLOW;
1328 			break;
1329 		}
1330 		*(uint8_t *)pr_val = (port->mlp_max_proto &
1331 		    MLXCX_PROTO_100M) != 0;
1332 		break;
1333 	default:
1334 		ret = ENOTSUP;
1335 		break;
1336 	}
1337 
1338 	mutex_exit(&port->mlp_mtx);
1339 
1340 	return (ret);
1341 }
1342 
1343 #define	MLXCX_MAC_CALLBACK_FLAGS \
1344 	(MC_GETCAPAB | MC_GETPROP | MC_PROPINFO | MC_SETPROP)
1345 
1346 static mac_callbacks_t mlxcx_mac_callbacks = {
1347 	.mc_callbacks = MLXCX_MAC_CALLBACK_FLAGS,
1348 	.mc_getstat = mlxcx_mac_stat,
1349 	.mc_start = mlxcx_mac_start,
1350 	.mc_stop = mlxcx_mac_stop,
1351 	.mc_setpromisc = mlxcx_mac_setpromisc,
1352 	.mc_multicst = mlxcx_mac_multicast,
1353 	.mc_ioctl = NULL,
1354 	.mc_getcapab = mlxcx_mac_getcapab,
1355 	.mc_setprop = mlxcx_mac_setprop,
1356 	.mc_getprop = mlxcx_mac_getprop,
1357 	.mc_propinfo = mlxcx_mac_propinfo,
1358 	.mc_tx = NULL,
1359 	.mc_unicst = NULL,
1360 };
1361 
1362 boolean_t
1363 mlxcx_register_mac(mlxcx_t *mlxp)
1364 {
1365 	mac_register_t *mac = mac_alloc(MAC_VERSION);
1366 	mlxcx_port_t *port;
1367 	int ret;
1368 
1369 	if (mac == NULL)
1370 		return (B_FALSE);
1371 
1372 	VERIFY3U(mlxp->mlx_nports, ==, 1);
1373 	port = &mlxp->mlx_ports[0];
1374 
1375 	mac->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
1376 	mac->m_driver = mlxp;
1377 	mac->m_dip = mlxp->mlx_dip;
1378 	mac->m_src_addr = port->mlp_mac_address;
1379 	mac->m_callbacks = &mlxcx_mac_callbacks;
1380 	mac->m_min_sdu = MLXCX_MTU_OFFSET;
1381 	mac->m_max_sdu = port->mlp_mtu - MLXCX_MTU_OFFSET;
1382 	mac->m_margin = VLAN_TAGSZ;
1383 	mac->m_priv_props = mlxcx_priv_props;
1384 	mac->m_v12n = MAC_VIRT_LEVEL1;
1385 
1386 	ret = mac_register(mac, &mlxp->mlx_mac_hdl);
1387 	if (ret != 0) {
1388 		mlxcx_warn(mlxp, "mac_register() returned %d", ret);
1389 	}
1390 	mac_free(mac);
1391 
1392 	mlxcx_update_link_state(mlxp, port);
1393 
1394 	return (ret == 0);
1395 }
1396