1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * This file is part of the Chelsio T4 support code. 14 * 15 * Copyright (C) 2010-2013 Chelsio Communications. All rights reserved. 16 * 17 * This program is distributed in the hope that it will be useful, but WITHOUT 18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 19 * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this 20 * release for licensing terms and conditions. 21 */ 22 23 #include <sys/ddi.h> 24 #include <sys/sunddi.h> 25 #include <sys/dlpi.h> 26 #include <sys/mac_provider.h> 27 #include <sys/mac_ether.h> 28 #include <sys/strsubr.h> 29 #include <sys/queue.h> 30 31 #include "common/common.h" 32 #include "common/t4_regs.h" 33 34 static int t4_mc_getstat(void *arg, uint_t stat, uint64_t *val); 35 static int t4_mc_start(void *arg); 36 static void t4_mc_stop(void *arg); 37 static int t4_mc_setpromisc(void *arg, boolean_t on); 38 static int t4_mc_multicst(void *arg, boolean_t add, const uint8_t *mcaddr); 39 static int t4_mc_unicst(void *arg, const uint8_t *ucaddr); 40 static boolean_t t4_mc_getcapab(void *arg, mac_capab_t cap, void *data); 41 static int t4_mc_setprop(void *arg, const char *name, mac_prop_id_t id, 42 uint_t size, const void *val); 43 static int t4_mc_getprop(void *arg, const char *name, mac_prop_id_t id, 44 uint_t size, void *val); 45 static void t4_mc_propinfo(void *arg, const char *name, mac_prop_id_t id, 46 mac_prop_info_handle_t ph); 47 48 static int begin_synchronized_op(struct port_info *pi, int hold, int waitok); 49 static void end_synchronized_op(struct port_info *pi, int held); 50 static int t4_init_synchronized(struct port_info *pi); 51 static int t4_uninit_synchronized(struct port_info *pi); 52 static void propinfo(struct port_info *pi, const char *name, 53 mac_prop_info_handle_t ph); 54 static int getprop(struct port_info *pi, const char *name, uint_t size, 55 void *val); 56 static int setprop(struct port_info *pi, const char *name, const void *val); 57 58 mac_callbacks_t t4_m_callbacks = { 59 .mc_callbacks = MC_GETCAPAB | MC_PROPERTIES, 60 .mc_getstat = t4_mc_getstat, 61 .mc_start = t4_mc_start, 62 .mc_stop = t4_mc_stop, 63 .mc_setpromisc = t4_mc_setpromisc, 64 .mc_multicst = t4_mc_multicst, 65 .mc_unicst = t4_mc_unicst, 66 .mc_tx = t4_mc_tx, 67 .mc_getcapab = t4_mc_getcapab, 68 .mc_setprop = t4_mc_setprop, 69 .mc_getprop = t4_mc_getprop, 70 .mc_propinfo = t4_mc_propinfo, 71 }; 72 73 /* I couldn't comeup with a better idea of not redefine 74 * another strcture and instead somehow reuse the earlier 75 * above structure and modify its members. 76 */ 77 mac_callbacks_t t4_m_ring_callbacks = { 78 .mc_callbacks = MC_GETCAPAB | MC_PROPERTIES, 79 .mc_getstat = t4_mc_getstat, 80 .mc_start = t4_mc_start, 81 .mc_stop = t4_mc_stop, 82 .mc_setpromisc =t4_mc_setpromisc, 83 .mc_multicst = t4_mc_multicst, 84 .mc_unicst = NULL, /* t4_addmac */ 85 .mc_tx = NULL, /* t4_eth_tx */ 86 .mc_getcapab = t4_mc_getcapab, 87 .mc_setprop = t4_mc_setprop, 88 .mc_getprop = t4_mc_getprop, 89 .mc_propinfo = t4_mc_propinfo, 90 }; 91 92 #define T4PROP_TMR_IDX "_holdoff_timer_idx" 93 #define T4PROP_PKTC_IDX "_holdoff_pktc_idx" 94 #define T4PROP_MTU "_mtu" 95 #define T4PROP_HW_CSUM "_hw_csum" 96 #define T4PROP_HW_LSO "_hw_lso" 97 #define T4PROP_TX_PAUSE "_tx_pause" 98 #define T4PROP_RX_PAUSE "_rx_pause" 99 100 char *t4_priv_props[] = { 101 T4PROP_TMR_IDX, 102 T4PROP_PKTC_IDX, 103 #if MAC_VERSION == 1 104 /* MAC_VERSION 1 doesn't seem to use MAC_PROP_MTU, hmmmm */ 105 T4PROP_MTU, 106 #endif 107 T4PROP_HW_CSUM, 108 T4PROP_HW_LSO, 109 T4PROP_TX_PAUSE, 110 T4PROP_RX_PAUSE, 111 NULL 112 }; 113 114 static int 115 t4_mc_getstat(void *arg, uint_t stat, uint64_t *val) 116 { 117 struct port_info *pi = arg; 118 struct adapter *sc = pi->adapter; 119 struct link_config *lc = &pi->link_cfg; 120 121 #define GET_STAT(name) \ 122 t4_read_reg64(sc, PORT_REG(pi->tx_chan, A_MPS_PORT_STAT_##name##_L)) 123 124 switch (stat) { 125 case MAC_STAT_IFSPEED: 126 if (lc->link_ok != 0) { 127 *val = lc->speed; 128 *val *= 1000000; 129 } else 130 *val = 0; 131 break; 132 133 case MAC_STAT_MULTIRCV: 134 *val = GET_STAT(RX_PORT_MCAST); 135 break; 136 137 case MAC_STAT_BRDCSTRCV: 138 *val = GET_STAT(RX_PORT_BCAST); 139 break; 140 141 case MAC_STAT_MULTIXMT: 142 *val = GET_STAT(TX_PORT_MCAST); 143 break; 144 145 case MAC_STAT_BRDCSTXMT: 146 *val = GET_STAT(TX_PORT_BCAST); 147 break; 148 149 case MAC_STAT_NORCVBUF: 150 *val = 0; /* TODO should come from rxq->nomem */ 151 break; 152 153 case MAC_STAT_IERRORS: 154 *val = GET_STAT(RX_PORT_MTU_ERROR) + 155 GET_STAT(RX_PORT_MTU_CRC_ERROR) + 156 GET_STAT(RX_PORT_CRC_ERROR) + 157 GET_STAT(RX_PORT_LEN_ERROR) + 158 GET_STAT(RX_PORT_SYM_ERROR) + 159 GET_STAT(RX_PORT_LESS_64B); 160 break; 161 162 case MAC_STAT_UNKNOWNS: 163 return (ENOTSUP); 164 165 case MAC_STAT_NOXMTBUF: 166 *val = GET_STAT(TX_PORT_DROP); 167 break; 168 169 case MAC_STAT_OERRORS: 170 *val = GET_STAT(TX_PORT_ERROR); 171 break; 172 173 case MAC_STAT_COLLISIONS: 174 return (ENOTSUP); 175 176 case MAC_STAT_RBYTES: 177 *val = GET_STAT(RX_PORT_BYTES); 178 break; 179 180 case MAC_STAT_IPACKETS: 181 *val = GET_STAT(RX_PORT_FRAMES); 182 break; 183 184 case MAC_STAT_OBYTES: 185 *val = GET_STAT(TX_PORT_BYTES); 186 break; 187 188 case MAC_STAT_OPACKETS: 189 *val = GET_STAT(TX_PORT_FRAMES); 190 break; 191 192 case ETHER_STAT_ALIGN_ERRORS: 193 return (ENOTSUP); 194 195 case ETHER_STAT_FCS_ERRORS: 196 *val = GET_STAT(RX_PORT_CRC_ERROR); 197 break; 198 199 case ETHER_STAT_FIRST_COLLISIONS: 200 case ETHER_STAT_MULTI_COLLISIONS: 201 case ETHER_STAT_SQE_ERRORS: 202 case ETHER_STAT_DEFER_XMTS: 203 case ETHER_STAT_TX_LATE_COLLISIONS: 204 case ETHER_STAT_EX_COLLISIONS: 205 return (ENOTSUP); 206 207 case ETHER_STAT_MACXMT_ERRORS: 208 *val = GET_STAT(TX_PORT_ERROR); 209 break; 210 211 case ETHER_STAT_CARRIER_ERRORS: 212 return (ENOTSUP); 213 214 case ETHER_STAT_TOOLONG_ERRORS: 215 *val = GET_STAT(RX_PORT_MTU_ERROR); 216 break; 217 218 case ETHER_STAT_MACRCV_ERRORS: 219 *val = GET_STAT(RX_PORT_MTU_ERROR) + 220 GET_STAT(RX_PORT_MTU_CRC_ERROR) + 221 GET_STAT(RX_PORT_CRC_ERROR) + 222 GET_STAT(RX_PORT_LEN_ERROR) + 223 GET_STAT(RX_PORT_SYM_ERROR) + 224 GET_STAT(RX_PORT_LESS_64B); 225 break; 226 227 case ETHER_STAT_XCVR_ADDR: 228 case ETHER_STAT_XCVR_ID: 229 case ETHER_STAT_XCVR_INUSE: 230 return (ENOTSUP); 231 232 case ETHER_STAT_CAP_100GFDX: 233 *val = !!(lc->supported & FW_PORT_CAP_SPEED_100G); 234 break; 235 236 case ETHER_STAT_CAP_40GFDX: 237 *val = !!(lc->supported & FW_PORT_CAP_SPEED_40G); 238 break; 239 240 case ETHER_STAT_CAP_25GFDX: 241 *val = !!(lc->supported & FW_PORT_CAP_SPEED_25G); 242 break; 243 244 case ETHER_STAT_CAP_10GFDX: 245 *val = !!(lc->supported & FW_PORT_CAP_SPEED_10G); 246 break; 247 248 case ETHER_STAT_CAP_1000FDX: 249 *val = !!(lc->supported & FW_PORT_CAP_SPEED_1G); 250 break; 251 252 case ETHER_STAT_CAP_1000HDX: 253 return (ENOTSUP); 254 255 case ETHER_STAT_CAP_100FDX: 256 *val = !!(lc->supported & FW_PORT_CAP_SPEED_100M); 257 break; 258 259 case ETHER_STAT_CAP_100HDX: 260 return (ENOTSUP); 261 262 case ETHER_STAT_CAP_10FDX: 263 case ETHER_STAT_CAP_10HDX: 264 return (ENOTSUP); 265 266 case ETHER_STAT_CAP_ASMPAUSE: 267 *val = 0; 268 break; 269 270 case ETHER_STAT_CAP_PAUSE: 271 *val = 1; 272 break; 273 274 case ETHER_STAT_CAP_AUTONEG: 275 *val = !!(lc->supported & FW_PORT_CAP_ANEG); 276 break; 277 278 /* 279 * We have set flow control configuration based on tx_pause and rx_pause 280 * values supported through ndd. Now, we need to translate the settings 281 * we have in link_config structure to adv_cap_asmpause and 282 * adv_cap_pause. 283 * 284 * There are 4 combinations possible and the translation is as below: 285 * tx_pause = 0 => We don't send pause frames during Rx congestion 286 * tx_pause = 1 => We send pause frames during Rx congestion 287 * rx_pause = 0 => We ignore received pause frames 288 * rx_pause = 1 => We pause transmission when we receive pause frames 289 * 290 * +----------------------------+----------------------------------+ 291 * | tx_pause | rx_pause | adv_cap_asmpause | adv_cap_pause | 292 * +-------------------------+-------------------------------------+ 293 * | 0 | 0 | 0 | 0 | 294 * | 0 | 1 | 1 | 0 | 295 * | 1 | 0 | 1 | 1 | 296 * | 1 | 1 | 0 | 1 | 297 * +----------------------------+----------------------------------+ 298 */ 299 300 /* Advertised asymmetric pause capability */ 301 case ETHER_STAT_ADV_CAP_ASMPAUSE: 302 *val = (((lc->requested_fc & PAUSE_TX) ? 1 : 0) ^ 303 (lc->requested_fc & PAUSE_RX)); 304 break; 305 306 /* Advertised pause capability */ 307 case ETHER_STAT_ADV_CAP_PAUSE: 308 *val = (lc->requested_fc & PAUSE_TX) ? 1 : 0; 309 break; 310 311 case ETHER_STAT_ADV_CAP_100GFDX: 312 *val = !!(lc->advertising & FW_PORT_CAP_SPEED_100G); 313 break; 314 315 case ETHER_STAT_ADV_CAP_40GFDX: 316 *val = !!(lc->advertising & FW_PORT_CAP_SPEED_40G); 317 break; 318 319 case ETHER_STAT_ADV_CAP_25GFDX: 320 *val = !!(lc->advertising & FW_PORT_CAP_SPEED_25G); 321 break; 322 323 case ETHER_STAT_ADV_CAP_10GFDX: 324 *val = !!(lc->advertising & FW_PORT_CAP_SPEED_10G); 325 break; 326 327 case ETHER_STAT_ADV_CAP_1000FDX: 328 *val = !!(lc->advertising & FW_PORT_CAP_SPEED_1G); 329 break; 330 331 case ETHER_STAT_ADV_CAP_AUTONEG: 332 *val = !!(lc->advertising & FW_PORT_CAP_ANEG); 333 break; 334 335 case ETHER_STAT_ADV_CAP_1000HDX: 336 case ETHER_STAT_ADV_CAP_100FDX: 337 case ETHER_STAT_ADV_CAP_100HDX: 338 case ETHER_STAT_ADV_CAP_10FDX: 339 case ETHER_STAT_ADV_CAP_10HDX: 340 return (ENOTSUP); /* TODO */ 341 342 343 case ETHER_STAT_LP_CAP_100GFDX: 344 *val = !!(lc->lp_advertising & FW_PORT_CAP_SPEED_100G); 345 break; 346 347 case ETHER_STAT_LP_CAP_40GFDX: 348 *val = !!(lc->lp_advertising & FW_PORT_CAP_SPEED_40G); 349 break; 350 351 case ETHER_STAT_LP_CAP_25GFDX: 352 *val = !!(lc->lp_advertising & FW_PORT_CAP_SPEED_25G); 353 break; 354 355 case ETHER_STAT_LP_CAP_10GFDX: 356 *val = !!(lc->lp_advertising & FW_PORT_CAP_SPEED_10G); 357 break; 358 359 case ETHER_STAT_LP_CAP_1000FDX: 360 *val = !!(lc->lp_advertising & FW_PORT_CAP_SPEED_1G); 361 break; 362 363 case ETHER_STAT_LP_CAP_AUTONEG: 364 *val = !!(lc->lp_advertising & FW_PORT_CAP_ANEG); 365 break; 366 367 case ETHER_STAT_LP_CAP_1000HDX: 368 case ETHER_STAT_LP_CAP_100FDX: 369 case ETHER_STAT_LP_CAP_100HDX: 370 case ETHER_STAT_LP_CAP_10FDX: 371 case ETHER_STAT_LP_CAP_10HDX: 372 case ETHER_STAT_LP_CAP_ASMPAUSE: 373 case ETHER_STAT_LP_CAP_PAUSE: 374 return (ENOTSUP); 375 376 case ETHER_STAT_LINK_ASMPAUSE: 377 *val = 0; 378 break; 379 380 case ETHER_STAT_LINK_PAUSE: 381 *val = 1; 382 break; 383 384 case ETHER_STAT_LINK_AUTONEG: 385 *val = lc->autoneg == AUTONEG_ENABLE; 386 break; 387 388 case ETHER_STAT_LINK_DUPLEX: 389 if (lc->link_ok != 0) 390 *val = LINK_DUPLEX_FULL; 391 else 392 *val = LINK_DUPLEX_UNKNOWN; 393 break; 394 395 default: 396 #ifdef DEBUG 397 cxgb_printf(pi->dip, CE_NOTE, "stat %d not implemented.", stat); 398 #endif 399 return (ENOTSUP); 400 } 401 #undef GET_STAT 402 403 return (0); 404 } 405 406 static int 407 t4_mc_start(void *arg) 408 { 409 struct port_info *pi = arg; 410 int rc; 411 412 rc = begin_synchronized_op(pi, 0, 1); 413 if (rc != 0) 414 return (rc); 415 rc = t4_init_synchronized(pi); 416 end_synchronized_op(pi, 0); 417 418 return (rc); 419 } 420 421 static void 422 t4_mc_stop(void *arg) 423 { 424 struct port_info *pi = arg; 425 426 while (begin_synchronized_op(pi, 0, 1) != 0) 427 continue; 428 (void) t4_uninit_synchronized(pi); 429 end_synchronized_op(pi, 0); 430 } 431 432 static int 433 t4_mc_setpromisc(void *arg, boolean_t on) 434 { 435 struct port_info *pi = arg; 436 struct adapter *sc = pi->adapter; 437 int rc; 438 439 rc = begin_synchronized_op(pi, 1, 1); 440 if (rc != 0) 441 return (rc); 442 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, -1, on ? 1 : 0, -1, -1, -1, 443 false); 444 end_synchronized_op(pi, 1); 445 446 return (rc); 447 } 448 449 /* 450 * TODO: Starts failing as soon as the 336 entry table fills up. Need to use 451 * hash in that case. 452 */ 453 static int 454 t4_mc_multicst(void *arg, boolean_t add, const uint8_t *mcaddr) 455 { 456 struct port_info *pi = arg; 457 struct adapter *sc = pi->adapter; 458 struct fw_vi_mac_cmd c; 459 int len16, rc; 460 461 len16 = howmany(sizeof (c.op_to_viid) + sizeof (c.freemacs_to_len16) + 462 sizeof (c.u.exact[0]), 16); 463 c.op_to_viid = htonl(V_FW_CMD_OP(FW_VI_MAC_CMD) | F_FW_CMD_REQUEST | 464 F_FW_CMD_WRITE | V_FW_VI_MAC_CMD_VIID(pi->viid)); 465 c.freemacs_to_len16 = htonl(V_FW_CMD_LEN16(len16)); 466 c.u.exact[0].valid_to_idx = htons(F_FW_VI_MAC_CMD_VALID | 467 V_FW_VI_MAC_CMD_IDX(add ? FW_VI_MAC_ADD_MAC : 468 FW_VI_MAC_MAC_BASED_FREE)); 469 bcopy(mcaddr, &c.u.exact[0].macaddr, ETHERADDRL); 470 471 rc = begin_synchronized_op(pi, 1, 1); 472 if (rc != 0) 473 return (rc); 474 rc = -t4_wr_mbox_meat(sc, sc->mbox, &c, len16 * 16, &c, true); 475 end_synchronized_op(pi, 1); 476 if (rc != 0) 477 return (rc); 478 #ifdef DEBUG 479 /* 480 * TODO: Firmware doesn't seem to return the correct index on removal 481 * (it gives back 0x3fd FW_VI_MAC_MAC_BASED_FREE unchanged. Remove this 482 * code once it is fixed. 483 */ 484 else { 485 uint16_t idx; 486 487 idx = G_FW_VI_MAC_CMD_IDX(ntohs(c.u.exact[0].valid_to_idx)); 488 cxgb_printf(pi->dip, CE_NOTE, 489 "%02x:%02x:%02x:%02x:%02x:%02x %s %d", mcaddr[0], 490 mcaddr[1], mcaddr[2], mcaddr[3], mcaddr[4], mcaddr[5], 491 add ? "added at index" : "removed from index", idx); 492 } 493 #endif 494 495 return (0); 496 } 497 498 int 499 t4_mc_unicst(void *arg, const uint8_t *ucaddr) 500 { 501 struct port_info *pi = arg; 502 struct adapter *sc = pi->adapter; 503 int rc; 504 505 if (ucaddr == NULL) 506 return (EINVAL); 507 508 rc = begin_synchronized_op(pi, 1, 1); 509 if (rc != 0) 510 return (rc); 511 512 /* We will support adding only one mac address */ 513 if (pi->adapter->props.multi_rings && pi->macaddr_cnt) { 514 end_synchronized_op(pi, 1); 515 return (ENOSPC); 516 } 517 rc = t4_change_mac(sc, sc->mbox, pi->viid, pi->xact_addr_filt, ucaddr, 518 true, true); 519 if (rc < 0) 520 rc = -rc; 521 else { 522 pi->macaddr_cnt++; 523 pi->xact_addr_filt = rc; 524 rc = 0; 525 } 526 end_synchronized_op(pi, 1); 527 528 return (rc); 529 } 530 531 int 532 t4_addmac(void *arg, const uint8_t *ucaddr) 533 { 534 return (t4_mc_unicst(arg, ucaddr)); 535 } 536 537 static int 538 t4_remmac(void *arg, const uint8_t *mac_addr) 539 { 540 struct port_info *pi = arg; 541 int rc; 542 543 rc = begin_synchronized_op(pi, 1, 1); 544 if (rc != 0) 545 return (rc); 546 547 pi->macaddr_cnt--; 548 end_synchronized_op(pi, 1); 549 550 return (0); 551 } 552 553 /* 554 * Callback funtion for MAC layer to register all groups. 555 */ 556 void 557 t4_fill_group(void *arg, mac_ring_type_t rtype, const int rg_index, 558 mac_group_info_t *infop, mac_group_handle_t gh) 559 { 560 struct port_info *pi = arg; 561 562 switch (rtype) { 563 case MAC_RING_TYPE_RX: { 564 infop->mgi_driver = (mac_group_driver_t)arg; 565 infop->mgi_start = NULL; 566 infop->mgi_stop = NULL; 567 infop->mgi_addmac = t4_addmac; 568 infop->mgi_remmac = t4_remmac; 569 infop->mgi_count = pi->nrxq; 570 break; 571 } 572 case MAC_RING_TYPE_TX: 573 default: 574 ASSERT(0); 575 break; 576 } 577 } 578 579 static int 580 t4_ring_start(mac_ring_driver_t rh, uint64_t mr_gen_num) 581 { 582 struct sge_rxq *rxq = (struct sge_rxq *)rh; 583 584 RXQ_LOCK(rxq); 585 rxq->ring_gen_num = mr_gen_num; 586 RXQ_UNLOCK(rxq); 587 return (0); 588 } 589 590 /* 591 * Enable interrupt on the specificed rx ring. 592 */ 593 int 594 t4_ring_intr_enable(mac_intr_handle_t intrh) 595 { 596 struct sge_rxq *rxq = (struct sge_rxq *)intrh; 597 struct adapter *sc = rxq->port->adapter; 598 struct sge_iq *iq; 599 600 iq = &rxq->iq; 601 RXQ_LOCK(rxq); 602 iq->polling = 0; 603 iq->state = IQS_IDLE; 604 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), 605 V_SEINTARM(iq->intr_params) | V_INGRESSQID(iq->cntxt_id)); 606 RXQ_UNLOCK(rxq); 607 return (0); 608 } 609 610 /* 611 * Disable interrupt on the specificed rx ring. 612 */ 613 int 614 t4_ring_intr_disable(mac_intr_handle_t intrh) 615 { 616 struct sge_rxq *rxq = (struct sge_rxq *)intrh; 617 struct sge_iq *iq; 618 619 /* Nothing to be done here wrt interrupt, as it 620 * will not fire, until we write back to 621 * A_SGE_PF_GTS.SEIntArm in t4_ring_intr_enable. 622 */ 623 624 iq = &rxq->iq; 625 RXQ_LOCK(rxq); 626 iq->polling = 1; 627 iq->state = IQS_BUSY; 628 RXQ_UNLOCK(rxq); 629 return (0); 630 } 631 632 mblk_t * 633 t4_poll_ring(void *arg, int n_bytes) 634 { 635 struct sge_rxq *rxq = (struct sge_rxq *)arg; 636 mblk_t *mp = NULL; 637 638 ASSERT(n_bytes >= 0); 639 if (n_bytes == 0) 640 return (NULL); 641 642 RXQ_LOCK(rxq); 643 mp = t4_ring_rx(rxq, n_bytes); 644 RXQ_UNLOCK(rxq); 645 646 return (mp); 647 } 648 649 /* 650 * Retrieve a value for one of the statistics for a particular rx ring 651 */ 652 int 653 t4_rx_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val) 654 { 655 struct sge_rxq *rxq = (struct sge_rxq *)rh; 656 657 switch (stat) { 658 case MAC_STAT_RBYTES: 659 *val = rxq->rxbytes; 660 break; 661 662 case MAC_STAT_IPACKETS: 663 *val = rxq->rxpkts; 664 break; 665 666 default: 667 *val = 0; 668 return (ENOTSUP); 669 } 670 671 return (0); 672 } 673 674 /* 675 * Retrieve a value for one of the statistics for a particular tx ring 676 */ 677 int 678 t4_tx_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val) 679 { 680 struct sge_txq *txq = (struct sge_txq *)rh; 681 682 switch (stat) { 683 case MAC_STAT_RBYTES: 684 *val = txq->txbytes; 685 break; 686 687 case MAC_STAT_IPACKETS: 688 *val = txq->txpkts; 689 break; 690 691 default: 692 *val = 0; 693 return (ENOTSUP); 694 } 695 696 return (0); 697 } 698 699 /* 700 * Callback funtion for MAC layer to register all rings 701 * for given ring_group, noted by group_index. 702 * Since we have only one group, ring index becomes 703 * absolute index. 704 */ 705 void 706 t4_fill_ring(void *arg, mac_ring_type_t rtype, const int group_index, 707 const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh) 708 { 709 struct port_info *pi = arg; 710 mac_intr_t *mintr; 711 712 switch (rtype) { 713 case MAC_RING_TYPE_RX: { 714 struct sge_rxq *rxq; 715 716 rxq = &pi->adapter->sge.rxq[pi->first_rxq + ring_index]; 717 rxq->ring_handle = rh; 718 719 infop->mri_driver = (mac_ring_driver_t)rxq; 720 infop->mri_start = t4_ring_start; 721 infop->mri_stop = NULL; 722 infop->mri_poll = t4_poll_ring; 723 infop->mri_stat = t4_rx_stat; 724 725 mintr = &infop->mri_intr; 726 mintr->mi_handle = (mac_intr_handle_t)rxq; 727 mintr->mi_enable = t4_ring_intr_enable; 728 mintr->mi_disable = t4_ring_intr_disable; 729 730 break; 731 } 732 case MAC_RING_TYPE_TX: { 733 struct sge_txq *txq = &pi->adapter->sge.txq[pi->first_txq + ring_index]; 734 txq->ring_handle = rh; 735 infop->mri_driver = (mac_ring_driver_t)txq; 736 infop->mri_start = NULL; 737 infop->mri_stop = NULL; 738 infop->mri_tx = t4_eth_tx; 739 infop->mri_stat = t4_tx_stat; 740 break; 741 } 742 default: 743 ASSERT(0); 744 break; 745 } 746 } 747 748 mblk_t * 749 t4_mc_tx(void *arg, mblk_t *m) 750 { 751 struct port_info *pi = arg; 752 struct adapter *sc = pi->adapter; 753 struct sge_txq *txq = &sc->sge.txq[pi->first_txq]; 754 755 return (t4_eth_tx(txq, m)); 756 } 757 758 static boolean_t 759 t4_mc_getcapab(void *arg, mac_capab_t cap, void *data) 760 { 761 struct port_info *pi = arg; 762 boolean_t status = B_TRUE; 763 764 switch (cap) { 765 case MAC_CAPAB_HCKSUM: 766 if (pi->features & CXGBE_HW_CSUM) { 767 uint32_t *d = data; 768 *d = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM; 769 } else 770 status = B_FALSE; 771 break; 772 773 case MAC_CAPAB_LSO: 774 /* Enabling LSO requires Checksum offloading */ 775 if (pi->features & CXGBE_HW_LSO && 776 pi->features & CXGBE_HW_CSUM) { 777 mac_capab_lso_t *d = data; 778 779 d->lso_flags = LSO_TX_BASIC_TCP_IPV4; 780 d->lso_basic_tcp_ipv4.lso_max = 65535; 781 } else 782 status = B_FALSE; 783 break; 784 785 case MAC_CAPAB_RINGS: { 786 mac_capab_rings_t *cap_rings = data; 787 788 if (!pi->adapter->props.multi_rings) { 789 status = B_FALSE; 790 break; 791 } 792 switch (cap_rings->mr_type) { 793 case MAC_RING_TYPE_RX: 794 cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC; 795 cap_rings->mr_rnum = pi->nrxq; 796 cap_rings->mr_gnum = 1; 797 cap_rings->mr_rget = t4_fill_ring; 798 cap_rings->mr_gget = t4_fill_group; 799 cap_rings->mr_gaddring = NULL; 800 cap_rings->mr_gremring = NULL; 801 break; 802 case MAC_RING_TYPE_TX: 803 cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC; 804 cap_rings->mr_rnum = pi->ntxq; 805 cap_rings->mr_gnum = 0; 806 cap_rings->mr_rget = t4_fill_ring; 807 cap_rings->mr_gget = NULL; 808 break; 809 } 810 break; 811 } 812 default: 813 status = B_FALSE; /* cap not supported */ 814 } 815 816 return (status); 817 } 818 819 /* ARGSUSED */ 820 static int 821 t4_mc_setprop(void *arg, const char *name, mac_prop_id_t id, uint_t size, 822 const void *val) 823 { 824 struct port_info *pi = arg; 825 struct adapter *sc = pi->adapter; 826 struct link_config lc_copy, *lc = &pi->link_cfg; 827 uint8_t v8 = *(uint8_t *)val; 828 uint32_t v32 = *(uint32_t *)val; 829 int old, new = 0, relink = 0, rx_mode = 0, rc = 0; 830 link_flowctrl_t fc; 831 832 /* 833 * Save a copy of link_config. This can be used to restore link_config 834 * if t4_link_l1cfg() fails. 835 */ 836 bcopy(lc, &lc_copy, sizeof (struct link_config)); 837 838 switch (id) { 839 case MAC_PROP_AUTONEG: 840 if (lc->supported & FW_PORT_CAP_ANEG) { 841 old = lc->autoneg; 842 new = v8 ? AUTONEG_ENABLE : AUTONEG_DISABLE; 843 if (old != new) { 844 /* LINTED: E_CONSTANT_CONDITION */ 845 lc->autoneg = new; 846 relink = 1; 847 if (new == AUTONEG_DISABLE) { 848 /* Only 100M is available */ 849 lc->requested_speed = 850 FW_PORT_CAP_SPEED_100M; 851 lc->advertising = 852 FW_PORT_CAP_SPEED_100M; 853 } else { 854 /* 855 * Advertise autonegotiation capability 856 * along with supported speeds 857 */ 858 lc->advertising |= (FW_PORT_CAP_ANEG | 859 (lc->supported & 860 (FW_PORT_CAP_SPEED_100M | 861 FW_PORT_CAP_SPEED_1G))); 862 lc->requested_speed = 0; 863 } 864 } 865 } else 866 rc = ENOTSUP; 867 break; 868 869 case MAC_PROP_MTU: 870 if (v32 < 46 || v32 > MAX_MTU) { 871 rc = EINVAL; 872 } else if (v32 != pi->mtu) { 873 pi->mtu = v32; 874 (void) mac_maxsdu_update(pi->mh, v32); 875 rx_mode = 1; 876 } 877 878 break; 879 880 case MAC_PROP_FLOWCTRL: 881 fc = *(link_flowctrl_t *)val; 882 old = lc->requested_fc & (PAUSE_TX | PAUSE_RX); 883 884 if (fc == LINK_FLOWCTRL_BI) 885 new = (PAUSE_TX | PAUSE_RX); 886 else if (fc == LINK_FLOWCTRL_TX) 887 new = PAUSE_TX; 888 else if (fc == LINK_FLOWCTRL_RX) 889 new = PAUSE_RX; 890 891 if (new != old) { 892 lc->requested_fc &= ~(PAUSE_TX | PAUSE_RX); 893 lc->requested_fc |= new; 894 relink = 1; 895 } 896 break; 897 898 case MAC_PROP_EN_10GFDX_CAP: 899 if (lc->supported & FW_PORT_CAP_ANEG && is_10G_port(pi)) { 900 old = lc->advertising & FW_PORT_CAP_SPEED_10G; 901 new = v8 ? FW_PORT_CAP_SPEED_10G : 0; 902 if (new != old) { 903 lc->advertising &= ~FW_PORT_CAP_SPEED_10G; 904 lc->advertising |= new; 905 relink = 1; 906 } 907 } else 908 rc = ENOTSUP; 909 910 break; 911 912 case MAC_PROP_EN_1000FDX_CAP: 913 /* Forced 1G */ 914 if (lc->autoneg == AUTONEG_ENABLE) { 915 old = lc->advertising & FW_PORT_CAP_SPEED_1G; 916 new = v8 ? FW_PORT_CAP_SPEED_1G : 0; 917 918 if (old != new) { 919 lc->advertising &= ~FW_PORT_CAP_SPEED_1G; 920 lc->advertising |= new; 921 relink = 1; 922 } 923 } else 924 rc = ENOTSUP; 925 break; 926 927 case MAC_PROP_EN_100FDX_CAP: 928 /* Forced 100M */ 929 if (lc->autoneg == AUTONEG_ENABLE) { 930 old = lc->advertising & FW_PORT_CAP_SPEED_100M; 931 new = v8 ? FW_PORT_CAP_SPEED_100M : 0; 932 if (old != new) { 933 lc->advertising &= ~FW_PORT_CAP_SPEED_100M; 934 lc->advertising |= new; 935 relink = 1; 936 } 937 } else 938 rc = ENOTSUP; 939 break; 940 941 case MAC_PROP_PRIVATE: 942 rc = setprop(pi, name, val); 943 break; 944 945 default: 946 rc = ENOTSUP; 947 } 948 949 if (isset(&sc->open_device_map, pi->port_id) != 0) { 950 if (relink != 0) { 951 t4_os_link_changed(pi->adapter, pi->port_id, 0); 952 rc = begin_synchronized_op(pi, 1, 1); 953 if (rc != 0) 954 return (rc); 955 rc = -t4_link_l1cfg(sc, sc->mbox, pi->tx_chan, 956 &pi->link_cfg); 957 end_synchronized_op(pi, 1); 958 if (rc != 0) { 959 cxgb_printf(pi->dip, CE_WARN, 960 "start_link failed:%d", rc); 961 962 /* Restore link_config */ 963 bcopy(&lc_copy, lc, 964 sizeof (struct link_config)); 965 } 966 } 967 968 if (rx_mode != 0) { 969 rc = begin_synchronized_op(pi, 1, 1); 970 if (rc != 0) 971 return (rc); 972 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, v32, -1, 973 -1, -1, -1, false); 974 end_synchronized_op(pi, 1); 975 if (rc != 0) { 976 cxgb_printf(pi->dip, CE_WARN, 977 "set_rxmode failed: %d", rc); 978 } 979 } 980 } 981 982 return (rc); 983 } 984 985 static int 986 t4_mc_getprop(void *arg, const char *name, mac_prop_id_t id, uint_t size, 987 void *val) 988 { 989 struct port_info *pi = arg; 990 struct link_config *lc = &pi->link_cfg; 991 uint8_t *u = val; 992 993 switch (id) { 994 case MAC_PROP_DUPLEX: 995 *(link_duplex_t *)val = lc->link_ok ? LINK_DUPLEX_FULL : 996 LINK_DUPLEX_UNKNOWN; 997 break; 998 999 case MAC_PROP_SPEED: 1000 if (lc->link_ok != 0) { 1001 *(uint64_t *)val = lc->speed; 1002 *(uint64_t *)val *= 1000000; 1003 } else 1004 *(uint64_t *)val = 0; 1005 break; 1006 1007 case MAC_PROP_STATUS: 1008 *(link_state_t *)val = lc->link_ok ? LINK_STATE_UP : 1009 LINK_STATE_DOWN; 1010 break; 1011 1012 case MAC_PROP_AUTONEG: 1013 *u = lc->autoneg == AUTONEG_ENABLE; 1014 break; 1015 1016 case MAC_PROP_MTU: 1017 *(uint32_t *)val = pi->mtu; 1018 break; 1019 1020 case MAC_PROP_FLOWCTRL: 1021 if ((lc->requested_fc & (PAUSE_TX | PAUSE_RX)) == 1022 (PAUSE_TX | PAUSE_RX)) 1023 *(link_flowctrl_t *)val = LINK_FLOWCTRL_BI; 1024 else if (lc->requested_fc & PAUSE_TX) 1025 *(link_flowctrl_t *)val = LINK_FLOWCTRL_TX; 1026 else if (lc->requested_fc & PAUSE_RX) 1027 *(link_flowctrl_t *)val = LINK_FLOWCTRL_RX; 1028 else 1029 *(link_flowctrl_t *)val = LINK_FLOWCTRL_NONE; 1030 break; 1031 1032 case MAC_PROP_ADV_100GFDX_CAP: 1033 case MAC_PROP_EN_100GFDX_CAP: 1034 *u = !!(lc->advertising & FW_PORT_CAP_SPEED_100G); 1035 break; 1036 1037 case MAC_PROP_ADV_40GFDX_CAP: 1038 case MAC_PROP_EN_40GFDX_CAP: 1039 *u = !!(lc->advertising & FW_PORT_CAP_SPEED_40G); 1040 break; 1041 1042 case MAC_PROP_ADV_25GFDX_CAP: 1043 case MAC_PROP_EN_25GFDX_CAP: 1044 *u = !!(lc->advertising & FW_PORT_CAP_SPEED_25G); 1045 break; 1046 1047 case MAC_PROP_ADV_10GFDX_CAP: 1048 case MAC_PROP_EN_10GFDX_CAP: 1049 *u = !!(lc->advertising & FW_PORT_CAP_SPEED_10G); 1050 break; 1051 1052 case MAC_PROP_ADV_1000FDX_CAP: 1053 case MAC_PROP_EN_1000FDX_CAP: 1054 *u = !!(lc->advertising & FW_PORT_CAP_SPEED_1G); 1055 break; 1056 1057 case MAC_PROP_ADV_100FDX_CAP: 1058 case MAC_PROP_EN_100FDX_CAP: 1059 *u = !!(lc->advertising & FW_PORT_CAP_SPEED_100M); 1060 break; 1061 1062 case MAC_PROP_PRIVATE: 1063 return (getprop(pi, name, size, val)); 1064 1065 default: 1066 return (ENOTSUP); 1067 } 1068 1069 return (0); 1070 } 1071 1072 static void 1073 t4_mc_propinfo(void *arg, const char *name, mac_prop_id_t id, 1074 mac_prop_info_handle_t ph) 1075 { 1076 struct port_info *pi = arg; 1077 struct link_config *lc = &pi->link_cfg; 1078 1079 switch (id) { 1080 case MAC_PROP_DUPLEX: 1081 case MAC_PROP_SPEED: 1082 case MAC_PROP_STATUS: 1083 mac_prop_info_set_perm(ph, MAC_PROP_PERM_READ); 1084 break; 1085 1086 case MAC_PROP_AUTONEG: 1087 if (lc->supported & FW_PORT_CAP_ANEG) 1088 mac_prop_info_set_default_uint8(ph, 1); 1089 else 1090 mac_prop_info_set_perm(ph, MAC_PROP_PERM_READ); 1091 break; 1092 1093 case MAC_PROP_MTU: 1094 mac_prop_info_set_range_uint32(ph, 46, MAX_MTU); 1095 break; 1096 1097 case MAC_PROP_FLOWCTRL: 1098 mac_prop_info_set_default_link_flowctrl(ph, LINK_FLOWCTRL_BI); 1099 break; 1100 1101 case MAC_PROP_EN_10GFDX_CAP: 1102 if (lc->supported & FW_PORT_CAP_ANEG && 1103 lc->supported & FW_PORT_CAP_SPEED_10G) 1104 mac_prop_info_set_default_uint8(ph, 1); 1105 else 1106 mac_prop_info_set_perm(ph, MAC_PROP_PERM_READ); 1107 break; 1108 1109 case MAC_PROP_EN_1000FDX_CAP: 1110 if (lc->supported & FW_PORT_CAP_ANEG && 1111 lc->supported & FW_PORT_CAP_SPEED_1G) 1112 mac_prop_info_set_default_uint8(ph, 1); 1113 else 1114 mac_prop_info_set_perm(ph, MAC_PROP_PERM_READ); 1115 break; 1116 1117 case MAC_PROP_EN_100FDX_CAP: 1118 if (lc->supported & FW_PORT_CAP_ANEG && 1119 lc->supported & FW_PORT_CAP_SPEED_100M) 1120 mac_prop_info_set_default_uint8(ph, 1); 1121 else 1122 mac_prop_info_set_perm(ph, MAC_PROP_PERM_READ); 1123 break; 1124 1125 case MAC_PROP_ADV_10GFDX_CAP: 1126 case MAC_PROP_ADV_1000FDX_CAP: 1127 case MAC_PROP_ADV_100FDX_CAP: 1128 mac_prop_info_set_perm(ph, MAC_PROP_PERM_READ); 1129 break; 1130 1131 case MAC_PROP_PRIVATE: 1132 propinfo(pi, name, ph); 1133 break; 1134 1135 default: 1136 break; 1137 } 1138 } 1139 1140 static int 1141 begin_synchronized_op(struct port_info *pi, int hold, int waitok) 1142 { 1143 struct adapter *sc = pi->adapter; 1144 int rc = 0; 1145 1146 ADAPTER_LOCK(sc); 1147 while (!IS_DOOMED(pi) && IS_BUSY(sc)) { 1148 if (!waitok) { 1149 rc = EBUSY; 1150 goto failed; 1151 } else if (cv_wait_sig(&sc->cv, &sc->lock) == 0) { 1152 rc = EINTR; 1153 goto failed; 1154 } 1155 } 1156 if (IS_DOOMED(pi) != 0) { /* shouldn't happen on Solaris */ 1157 rc = ENXIO; 1158 goto failed; 1159 } 1160 ASSERT(!IS_BUSY(sc)); 1161 /* LINTED: E_CONSTANT_CONDITION */ 1162 SET_BUSY(sc); 1163 1164 if (!hold) 1165 ADAPTER_UNLOCK(sc); 1166 1167 return (0); 1168 failed: 1169 ADAPTER_UNLOCK(sc); 1170 return (rc); 1171 } 1172 1173 static void 1174 end_synchronized_op(struct port_info *pi, int held) 1175 { 1176 struct adapter *sc = pi->adapter; 1177 1178 if (!held) 1179 ADAPTER_LOCK(sc); 1180 1181 ADAPTER_LOCK_ASSERT_OWNED(sc); 1182 ASSERT(IS_BUSY(sc)); 1183 /* LINTED: E_CONSTANT_CONDITION */ 1184 CLR_BUSY(sc); 1185 cv_signal(&sc->cv); 1186 ADAPTER_UNLOCK(sc); 1187 } 1188 1189 static int 1190 t4_init_synchronized(struct port_info *pi) 1191 { 1192 struct adapter *sc = pi->adapter; 1193 int rc = 0; 1194 1195 ADAPTER_LOCK_ASSERT_NOTOWNED(sc); 1196 1197 if (isset(&sc->open_device_map, pi->port_id) != 0) 1198 return (0); /* already running */ 1199 1200 if (!(sc->flags & FULL_INIT_DONE) && 1201 ((rc = adapter_full_init(sc)) != 0)) 1202 return (rc); /* error message displayed already */ 1203 1204 if (!(pi->flags & PORT_INIT_DONE)) { 1205 rc = port_full_init(pi); 1206 if (rc != 0) 1207 return (rc); /* error message displayed already */ 1208 } else 1209 enable_port_queues(pi); 1210 1211 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, pi->mtu, 0, 0, 1, 0, false); 1212 if (rc != 0) { 1213 cxgb_printf(pi->dip, CE_WARN, "set_rxmode failed: %d", rc); 1214 goto done; 1215 } 1216 rc = t4_change_mac(sc, sc->mbox, pi->viid, pi->xact_addr_filt, 1217 pi->hw_addr, true, true); 1218 if (rc < 0) { 1219 cxgb_printf(pi->dip, CE_WARN, "change_mac failed: %d", rc); 1220 rc = -rc; 1221 goto done; 1222 } else 1223 /* LINTED: E_ASSIGN_NARROW_CONV */ 1224 pi->xact_addr_filt = rc; 1225 1226 rc = -t4_link_l1cfg(sc, sc->mbox, pi->tx_chan, &pi->link_cfg); 1227 if (rc != 0) { 1228 cxgb_printf(pi->dip, CE_WARN, "start_link failed: %d", rc); 1229 goto done; 1230 } 1231 1232 rc = -t4_enable_vi(sc, sc->mbox, pi->viid, true, true); 1233 if (rc != 0) { 1234 cxgb_printf(pi->dip, CE_WARN, "enable_vi failed: %d", rc); 1235 goto done; 1236 } 1237 1238 /* all ok */ 1239 setbit(&sc->open_device_map, pi->port_id); 1240 done: 1241 if (rc != 0) 1242 (void) t4_uninit_synchronized(pi); 1243 1244 return (rc); 1245 } 1246 1247 /* 1248 * Idempotent. 1249 */ 1250 static int 1251 t4_uninit_synchronized(struct port_info *pi) 1252 { 1253 struct adapter *sc = pi->adapter; 1254 int rc; 1255 1256 ADAPTER_LOCK_ASSERT_NOTOWNED(sc); 1257 1258 /* 1259 * Disable the VI so that all its data in either direction is discarded 1260 * by the MPS. Leave everything else (the queues, interrupts, and 1Hz 1261 * tick) intact as the TP can deliver negative advice or data that it's 1262 * holding in its RAM (for an offloaded connection) even after the VI is 1263 * disabled. 1264 */ 1265 rc = -t4_enable_vi(sc, sc->mbox, pi->viid, false, false); 1266 if (rc != 0) { 1267 cxgb_printf(pi->dip, CE_WARN, "disable_vi failed: %d", rc); 1268 return (rc); 1269 } 1270 1271 disable_port_queues(pi); 1272 1273 clrbit(&sc->open_device_map, pi->port_id); 1274 1275 pi->link_cfg.link_ok = 0; 1276 pi->link_cfg.speed = 0; 1277 mac_link_update(pi->mh, LINK_STATE_UNKNOWN); 1278 1279 return (0); 1280 } 1281 1282 static void 1283 propinfo(struct port_info *pi, const char *name, mac_prop_info_handle_t ph) 1284 { 1285 struct adapter *sc = pi->adapter; 1286 struct driver_properties *p = &sc->props; 1287 struct link_config *lc = &pi->link_cfg; 1288 int v; 1289 char str[16]; 1290 1291 if (strcmp(name, T4PROP_TMR_IDX) == 0) 1292 v = is_10G_port(pi) ? p->tmr_idx_10g : p->tmr_idx_1g; 1293 else if (strcmp(name, T4PROP_PKTC_IDX) == 0) 1294 v = is_10G_port(pi) ? p->pktc_idx_10g : p->pktc_idx_1g; 1295 else if (strcmp(name, T4PROP_HW_CSUM) == 0) 1296 v = (pi->features & CXGBE_HW_CSUM) ? 1 : 0; 1297 else if (strcmp(name, T4PROP_HW_LSO) == 0) 1298 v = (pi->features & CXGBE_HW_LSO) ? 1 : 0; 1299 else if (strcmp(name, T4PROP_TX_PAUSE) == 0) 1300 v = (lc->fc & PAUSE_TX) ? 1 : 0; 1301 else if (strcmp(name, T4PROP_RX_PAUSE) == 0) 1302 v = (lc->fc & PAUSE_RX) ? 1 : 0; 1303 #if MAC_VERSION == 1 1304 else if (strcmp(name, T4PROP_MTU) == 0) 1305 v = ETHERMTU; 1306 #endif 1307 else 1308 return; 1309 1310 (void) snprintf(str, sizeof (str), "%d", v); 1311 mac_prop_info_set_default_str(ph, str); 1312 } 1313 1314 static int 1315 getprop(struct port_info *pi, const char *name, uint_t size, void *val) 1316 { 1317 struct link_config *lc = &pi->link_cfg; 1318 int v; 1319 1320 if (strcmp(name, T4PROP_TMR_IDX) == 0) 1321 v = pi->tmr_idx; 1322 else if (strcmp(name, T4PROP_PKTC_IDX) == 0) 1323 v = pi->pktc_idx; 1324 else if (strcmp(name, T4PROP_HW_CSUM) == 0) 1325 v = (pi->features & CXGBE_HW_CSUM) ? 1 : 0; 1326 else if (strcmp(name, T4PROP_HW_LSO) == 0) 1327 v = (pi->features & CXGBE_HW_LSO) ? 1 : 0; 1328 else if (strcmp(name, T4PROP_TX_PAUSE) == 0) 1329 v = (lc->fc & PAUSE_TX) ? 1 : 0; 1330 else if (strcmp(name, T4PROP_RX_PAUSE) == 0) 1331 v = (lc->fc & PAUSE_RX) ? 1 : 0; 1332 #if MAC_VERSION == 1 1333 else if (strcmp(name, T4PROP_MTU) == 0) 1334 v = pi->mtu; 1335 #endif 1336 else 1337 return (ENOTSUP); 1338 1339 (void) snprintf(val, size, "%d", v); 1340 return (0); 1341 } 1342 1343 static int 1344 setprop(struct port_info *pi, const char *name, const void *val) 1345 { 1346 struct adapter *sc = pi->adapter; 1347 long v; 1348 int i, rc = 0, relink = 0, rx_mode = 0; 1349 struct sge_rxq *rxq; 1350 struct link_config lc_old, *lc = &pi->link_cfg; 1351 1352 /* 1353 * Save a copy of link_config. This can be used to restore link_config 1354 * if t4_link_l1cfg() fails. 1355 */ 1356 bcopy(lc, &lc_old, sizeof (struct link_config)); 1357 1358 (void) ddi_strtol(val, NULL, 0, &v); 1359 1360 if (strcmp(name, T4PROP_TMR_IDX) == 0) { 1361 if (v < 0 || v >= SGE_NTIMERS) 1362 return (EINVAL); 1363 if (v == pi->tmr_idx) 1364 return (0); 1365 1366 /* LINTED: E_ASSIGN_NARROW_CONV */ 1367 pi->tmr_idx = v; 1368 for_each_rxq(pi, i, rxq) { 1369 rxq->iq.intr_params = V_QINTR_TIMER_IDX(v) | 1370 V_QINTR_CNT_EN(pi->pktc_idx >= 0); 1371 } 1372 1373 } else if (strcmp(name, T4PROP_PKTC_IDX) == 0) { 1374 if (v >= SGE_NCOUNTERS) 1375 return (EINVAL); 1376 if (v == pi->pktc_idx || (v < 0 && pi->pktc_idx == -1)) 1377 return (0); 1378 1379 /* LINTED: E_ASSIGN_NARROW_CONV */ 1380 pi->pktc_idx = v < 0 ? -1 : v; 1381 for_each_rxq(pi, i, rxq) { 1382 rxq->iq.intr_params = V_QINTR_TIMER_IDX(pi->tmr_idx) | 1383 /* takes effect right away */ 1384 V_QINTR_CNT_EN(v >= 0); 1385 /* LINTED: E_ASSIGN_NARROW_CONV */ 1386 rxq->iq.intr_pktc_idx = v; /* this needs fresh plumb */ 1387 } 1388 } else if (strcmp(name, T4PROP_HW_CSUM) == 0) { 1389 if (v != 0 && v != 1) 1390 return (EINVAL); 1391 if (v == 1) 1392 pi->features |= CXGBE_HW_CSUM; 1393 else 1394 pi->features &= ~CXGBE_HW_CSUM; 1395 } else if (strcmp(name, T4PROP_HW_LSO) == 0) { 1396 if (v != 0 && v != 1) 1397 return (EINVAL); 1398 if (v == 1) 1399 pi->features |= CXGBE_HW_LSO; 1400 else 1401 pi->features &= ~CXGBE_HW_LSO; 1402 } else if (strcmp(name, T4PROP_TX_PAUSE) == 0) { 1403 if (v != 0 && v != 1) 1404 return (EINVAL); 1405 1406 if (v != 0) 1407 lc->requested_fc |= PAUSE_TX; 1408 else 1409 lc->requested_fc &= ~PAUSE_TX; 1410 1411 relink = 1; 1412 1413 } else if (strcmp(name, T4PROP_RX_PAUSE) == 0) { 1414 if (v != 0 && v != 1) 1415 return (EINVAL); 1416 1417 if (v != 0) 1418 lc->requested_fc |= PAUSE_RX; 1419 else 1420 lc->requested_fc &= ~PAUSE_RX; 1421 1422 relink = 1; 1423 } 1424 #if MAC_VERSION == 1 1425 else if (strcmp(name, T4PROP_MTU) == 0) { 1426 if (v < 46 || v > MAX_MTU) 1427 return (EINVAL); 1428 if (v == pi->mtu) 1429 return (0); 1430 1431 pi->mtu = (int)v; 1432 (void) mac_maxsdu_update(pi->mh, v); 1433 rx_mode = 1; 1434 } 1435 #endif 1436 else 1437 return (ENOTSUP); 1438 1439 if (!(relink || rx_mode)) 1440 return (0); 1441 1442 /* If we are here, either relink or rx_mode is 1 */ 1443 if (isset(&sc->open_device_map, pi->port_id) != 0) { 1444 if (relink != 0) { 1445 rc = begin_synchronized_op(pi, 1, 1); 1446 if (rc != 0) 1447 return (rc); 1448 rc = -t4_link_l1cfg(sc, sc->mbox, pi->tx_chan, lc); 1449 end_synchronized_op(pi, 1); 1450 if (rc != 0) { 1451 cxgb_printf(pi->dip, CE_WARN, 1452 "start_link failed:%d", rc); 1453 /* Restore link_config */ 1454 bcopy(&lc_old, lc, sizeof (struct link_config)); 1455 } 1456 } else if (rx_mode != 0) { 1457 rc = begin_synchronized_op(pi, 1, 1); 1458 if (rc != 0) 1459 return (rc); 1460 rc = -t4_set_rxmode(sc, sc->mbox, pi->viid, v, -1, -1, 1461 -1, -1, false); 1462 end_synchronized_op(pi, 1); 1463 if (rc != 0) { 1464 cxgb_printf(pi->dip, CE_WARN, 1465 "set_rxmode failed: %d", rc); 1466 } 1467 } 1468 return (rc); 1469 } 1470 1471 return (0); 1472 } 1473 1474 void 1475 t4_mc_init(struct port_info *pi) 1476 { 1477 pi->props = t4_priv_props; 1478 } 1479 1480 void 1481 t4_mc_cb_init(struct port_info *pi) 1482 { 1483 if (pi->adapter->props.multi_rings) 1484 pi->mc = &t4_m_ring_callbacks; 1485 else 1486 pi->mc = &t4_m_callbacks; 1487 } 1488 1489 void 1490 t4_os_link_changed(struct adapter *sc, int idx, int link_stat) 1491 { 1492 struct port_info *pi = sc->port[idx]; 1493 1494 mac_link_update(pi->mh, link_stat ? LINK_STATE_UP : LINK_STATE_DOWN); 1495 } 1496 1497 /* ARGSUSED */ 1498 void 1499 t4_mac_rx(struct port_info *pi, struct sge_rxq *rxq, mblk_t *m) 1500 { 1501 mac_rx(pi->mh, NULL, m); 1502 } 1503 1504 void 1505 t4_mac_tx_update(struct port_info *pi, struct sge_txq *txq) 1506 { 1507 if (pi->adapter->props.multi_rings) 1508 mac_tx_ring_update(pi->mh, txq->ring_handle); 1509 else 1510 mac_tx_update(pi->mh); 1511 } 1512