1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #include <cma.h> 28 29 #include <unistd.h> 30 #include <fcntl.h> 31 #include <strings.h> 32 #include <errno.h> 33 #include <time.h> 34 #include <fm/fmd_api.h> 35 #include <sys/fm/protocol.h> 36 #include <sys/systeminfo.h> 37 #include <sys/utsname.h> 38 39 #ifdef sun4v 40 #include <sys/fm/ldom.h> 41 42 static fmd_hdl_t *init_hdl; 43 ldom_hdl_t *cma_lhp; 44 #endif 45 46 #ifdef i386 47 boolean_t cma_is_native; 48 #endif 49 50 extern const char *fmd_fmri_get_platform(); 51 52 cma_t cma; 53 54 cma_stats_t cma_stats = { 55 { "cpu_flts", FMD_TYPE_UINT64, "cpu faults resolved" }, 56 { "cpu_repairs", FMD_TYPE_UINT64, "cpu faults repaired" }, 57 { "cpu_fails", FMD_TYPE_UINT64, "cpu faults unresolveable" }, 58 { "cpu_blfails", FMD_TYPE_UINT64, "failed cpu blacklists" }, 59 { "cpu_supp", FMD_TYPE_UINT64, "cpu offlines suppressed" }, 60 { "cpu_blsupp", FMD_TYPE_UINT64, "cpu blacklists suppressed" }, 61 { "page_flts", FMD_TYPE_UINT64, "page faults resolved" }, 62 { "page_repairs", FMD_TYPE_UINT64, "page faults repaired" }, 63 { "page_fails", FMD_TYPE_UINT64, "page faults unresolveable" }, 64 { "page_supp", FMD_TYPE_UINT64, "page retires suppressed" }, 65 { "page_nonent", FMD_TYPE_UINT64, "retires for non-existent fmris" }, 66 { "bad_flts", FMD_TYPE_UINT64, "invalid fault events received" }, 67 { "nop_flts", FMD_TYPE_UINT64, "inapplicable fault events received" }, 68 { "auto_flts", FMD_TYPE_UINT64, "auto-close faults received" } 69 }; 70 71 typedef struct cma_subscriber { 72 const char *subr_class; 73 const char *subr_sname; 74 uint_t subr_svers; 75 int (*subr_func)(fmd_hdl_t *, nvlist_t *, nvlist_t *, const char *, 76 boolean_t); 77 } cma_subscriber_t; 78 79 static const cma_subscriber_t cma_subrs[] = { 80 #if defined(i386) 81 /* 82 * On x86, the ASRUs are expected to be in hc scheme. When 83 * cpumem-retire wants to retire a cpu or mem page, it calls the 84 * methods registered in the topo node to do that. The topo 85 * enumerator, which necessarily knows all the config info that 86 * we'd ever need in deciding what/how to retire etc. This takes 87 * away much of that complexity from the agent into the entity 88 * that knows all config/topo information. 89 */ 90 { "fault.memory.page", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 91 cma_page_retire }, 92 { "fault.memory.page_sb", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 93 cma_page_retire }, 94 { "fault.memory.page_ck", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 95 cma_page_retire }, 96 { "fault.memory.page_ue", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 97 cma_page_retire }, 98 { "fault.memory.generic-x86.page_ce", FM_FMRI_SCHEME_HC, 99 FM_HC_SCHEME_VERSION, cma_page_retire }, 100 { "fault.memory.generic-x86.page_ue", FM_FMRI_SCHEME_HC, 101 FM_HC_SCHEME_VERSION, cma_page_retire }, 102 { "fault.memory.intel.page_ce", FM_FMRI_SCHEME_HC, 103 FM_HC_SCHEME_VERSION, cma_page_retire }, 104 { "fault.memory.intel.page_ue", FM_FMRI_SCHEME_HC, 105 FM_HC_SCHEME_VERSION, cma_page_retire }, 106 { "fault.memory.dimm", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 107 NULL }, 108 { "fault.memory.dimm_sb", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 109 NULL }, 110 { "fault.memory.dimm_ck", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 111 NULL }, 112 { "fault.memory.dimm_ue", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 113 NULL }, 114 { "fault.memory.generic-x86.dimm_ce", FM_FMRI_SCHEME_HC, 115 FM_HC_SCHEME_VERSION, NULL }, 116 { "fault.memory.generic-x86.dimm_ue", FM_FMRI_SCHEME_HC, 117 FM_HC_SCHEME_VERSION, NULL }, 118 { "fault.memory.intel.dimm_ce", FM_FMRI_SCHEME_HC, 119 FM_HC_SCHEME_VERSION, NULL }, 120 { "fault.memory.intel.dimm_ue", FM_FMRI_SCHEME_HC, 121 FM_HC_SCHEME_VERSION, NULL }, 122 { "fault.memory.intel.fbd.*", FM_FMRI_SCHEME_HC, 123 FM_HC_SCHEME_VERSION, NULL }, 124 { "fault.memory.dimm_testfail", FM_FMRI_SCHEME_HC, 125 FM_HC_SCHEME_VERSION, NULL }, 126 { "fault.memory.bank", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 127 NULL }, 128 { "fault.memory.datapath", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 129 NULL }, 130 { "fault.cpu.intel.quickpath.*", FM_FMRI_SCHEME_HC, 131 FM_HC_SCHEME_VERSION, NULL }, 132 { "fault.cpu.generic-x86.mc", FM_FMRI_SCHEME_HC, 133 FM_HC_SCHEME_VERSION, NULL }, 134 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_HC, 135 FM_HC_SCHEME_VERSION, NULL }, 136 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_CPU, 137 FM_CPU_SCHEME_VERSION, NULL }, 138 139 /* 140 * The ASRU for cpu faults are in cpu scheme on native and in hc 141 * scheme on xpv. So each cpu fault class needs to be listed twice. 142 */ 143 144 /* 145 * The following faults do NOT retire a cpu thread, 146 * and therefore must be intercepted before 147 * the default "fault.cpu.*" dispatch to cma_cpu_retire. 148 */ 149 { "fault.cpu.amd.dramchannel", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 150 NULL }, 151 { "fault.cpu.amd.dramchannel", FM_FMRI_SCHEME_CPU, 152 FM_CPU_SCHEME_VERSION, NULL }, 153 { "fault.cpu.generic-x86.bus_interconnect_memory", FM_FMRI_SCHEME_HC, 154 FM_HC_SCHEME_VERSION, NULL }, 155 { "fault.cpu.generic-x86.bus_interconnect_memory", FM_FMRI_SCHEME_CPU, 156 FM_CPU_SCHEME_VERSION, NULL }, 157 { "fault.cpu.generic-x86.bus_interconnect_io", FM_FMRI_SCHEME_HC, 158 FM_HC_SCHEME_VERSION, NULL }, 159 { "fault.cpu.generic-x86.bus_interconnect_io", FM_FMRI_SCHEME_CPU, 160 FM_CPU_SCHEME_VERSION, NULL }, 161 { "fault.cpu.generic-x86.bus_interconnect", FM_FMRI_SCHEME_HC, 162 FM_HC_SCHEME_VERSION, NULL }, 163 { "fault.cpu.generic-x86.bus_interconnect", FM_FMRI_SCHEME_CPU, 164 FM_CPU_SCHEME_VERSION, NULL }, 165 { "fault.cpu.intel.bus_interconnect_memory", FM_FMRI_SCHEME_HC, 166 FM_HC_SCHEME_VERSION, NULL }, 167 { "fault.cpu.intel.bus_interconnect_memory", FM_FMRI_SCHEME_CPU, 168 FM_CPU_SCHEME_VERSION, NULL }, 169 { "fault.cpu.intel.bus_interconnect_io", FM_FMRI_SCHEME_HC, 170 FM_HC_SCHEME_VERSION, NULL }, 171 { "fault.cpu.intel.bus_interconnect_io", FM_FMRI_SCHEME_CPU, 172 FM_CPU_SCHEME_VERSION, NULL }, 173 { "fault.cpu.intel.bus_interconnect", FM_FMRI_SCHEME_HC, 174 FM_HC_SCHEME_VERSION, NULL }, 175 { "fault.cpu.intel.bus_interconnect", FM_FMRI_SCHEME_CPU, 176 FM_CPU_SCHEME_VERSION, NULL }, 177 { "fault.cpu.intel.nb.*", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 178 NULL }, 179 { "fault.cpu.intel.nb.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 180 NULL }, 181 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 182 NULL }, 183 { "fault.cpu.intel.dma", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 184 NULL }, 185 { "fault.cpu.*", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 186 cma_cpu_hc_retire }, 187 { "fault.cpu.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 188 cma_cpu_hc_retire }, 189 #elif defined(sun4v) 190 { "fault.memory.page", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 191 cma_page_retire }, 192 { "fault.memory.dimm", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 193 NULL }, 194 { "fault.memory.dimm_sb", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 195 NULL }, 196 { "fault.memory.dimm_ck", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 197 NULL }, 198 { "fault.memory.dimm_ue", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 199 NULL }, 200 { "fault.memory.bank", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 201 NULL }, 202 { "fault.memory.datapath", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 203 NULL }, 204 { "fault.memory.link-c", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 205 NULL }, 206 { "fault.memory.link-u", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 207 NULL }, 208 { "fault.memory.link-f", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 209 NULL }, 210 { "fault.memory.link-c", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 211 NULL }, 212 { "fault.memory.link-u", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 213 NULL }, 214 { "fault.memory.link-f", FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, 215 NULL }, 216 217 /* 218 * The following ultraSPARC-T1/T2 faults do NOT retire a cpu thread, 219 * and therefore must be intercepted before 220 * the default "fault.cpu.*" dispatch to cma_cpu_retire. 221 */ 222 { "fault.cpu.*.l2cachedata", FM_FMRI_SCHEME_CPU, 223 FM_CPU_SCHEME_VERSION, NULL }, 224 { "fault.cpu.*.l2cachetag", FM_FMRI_SCHEME_CPU, 225 FM_CPU_SCHEME_VERSION, NULL }, 226 { "fault.cpu.*.l2cachectl", FM_FMRI_SCHEME_CPU, 227 FM_CPU_SCHEME_VERSION, NULL }, 228 { "fault.cpu.*.l2data-c", FM_FMRI_SCHEME_CPU, 229 FM_CPU_SCHEME_VERSION, NULL }, 230 { "fault.cpu.*.l2data-u", FM_FMRI_SCHEME_CPU, 231 FM_CPU_SCHEME_VERSION, NULL }, 232 { "fault.cpu.*.mau", FM_FMRI_SCHEME_CPU, 233 FM_CPU_SCHEME_VERSION, NULL }, 234 { "fault.cpu.*.lfu-u", FM_FMRI_SCHEME_CPU, 235 FM_CPU_SCHEME_VERSION, NULL }, 236 { "fault.cpu.*.lfu-f", FM_FMRI_SCHEME_CPU, 237 FM_CPU_SCHEME_VERSION, NULL }, 238 { "fault.cpu.*.lfu-p", FM_FMRI_SCHEME_CPU, 239 FM_CPU_SCHEME_VERSION, NULL }, 240 { "fault.cpu.ultraSPARC-T1.freg", FM_FMRI_SCHEME_CPU, 241 FM_CPU_SCHEME_VERSION, NULL }, 242 { "fault.cpu.ultraSPARC-T1.l2cachedata", FM_FMRI_SCHEME_CPU, 243 FM_CPU_SCHEME_VERSION, NULL }, 244 { "fault.cpu.ultraSPARC-T1.l2cachetag", FM_FMRI_SCHEME_CPU, 245 FM_CPU_SCHEME_VERSION, NULL }, 246 { "fault.cpu.ultraSPARC-T1.l2cachectl", FM_FMRI_SCHEME_CPU, 247 FM_CPU_SCHEME_VERSION, NULL }, 248 { "fault.cpu.ultraSPARC-T1.mau", FM_FMRI_SCHEME_CPU, 249 FM_CPU_SCHEME_VERSION, NULL }, 250 { "fault.cpu.ultraSPARC-T2plus.chip", FM_FMRI_SCHEME_HC, 251 FM_HC_SCHEME_VERSION, NULL }, 252 { "fault.cpu.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 253 cma_cpu_retire }, 254 #elif defined(opl) 255 { "fault.memory.page", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 256 cma_page_retire }, 257 { "fault.memory.dimm", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 258 NULL }, 259 { "fault.memory.bank", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 260 NULL }, 261 { "fault.cpu.SPARC64-VI.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 262 cma_cpu_retire }, 263 { "fault.cpu.SPARC64-VII.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 264 cma_cpu_retire }, 265 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.se", 266 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 267 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.se-offlinereq", 268 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 269 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.ce", 270 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 271 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VI.core.ce-offlinereq", 272 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 273 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.se", 274 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 275 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.se-offlinereq", 276 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 277 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.ce", 278 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 279 { "fault.chassis.SPARC-Enterprise.cpu.SPARC64-VII.core.ce-offlinereq", 280 FM_FMRI_SCHEME_HC, FM_HC_SCHEME_VERSION, cma_cpu_hc_retire }, 281 #else 282 /* 283 * For platforms excluding i386, sun4v and opl. 284 */ 285 { "fault.memory.page", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 286 cma_page_retire }, 287 { "fault.memory.page_sb", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 288 cma_page_retire }, 289 { "fault.memory.page_ck", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 290 cma_page_retire }, 291 { "fault.memory.page_ue", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 292 cma_page_retire }, 293 { "fault.memory.dimm", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 294 NULL }, 295 { "fault.memory.dimm_sb", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 296 NULL }, 297 { "fault.memory.dimm_ck", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 298 NULL }, 299 { "fault.memory.dimm_ue", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 300 NULL }, 301 { "fault.memory.dimm_testfail", FM_FMRI_SCHEME_MEM, 302 FM_MEM_SCHEME_VERSION, NULL }, 303 { "fault.memory.bank", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 304 NULL }, 305 { "fault.memory.datapath", FM_FMRI_SCHEME_MEM, FM_MEM_SCHEME_VERSION, 306 NULL }, 307 308 /* 309 * The following faults do NOT retire a cpu thread, 310 * and therefore must be intercepted before 311 * the default "fault.cpu.*" dispatch to cma_cpu_retire. 312 */ 313 { "fault.cpu.ultraSPARC-IVplus.l2cachedata-line", 314 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 315 cma_cache_way_retire }, 316 { "fault.cpu.ultraSPARC-IVplus.l3cachedata-line", 317 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 318 cma_cache_way_retire }, 319 { "fault.cpu.ultraSPARC-IVplus.l2cachetag-line", 320 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 321 cma_cache_way_retire }, 322 { "fault.cpu.ultraSPARC-IVplus.l3cachetag-line", 323 FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 324 cma_cache_way_retire }, 325 326 /* 327 * Default "fault.cpu.*" for "cpu" scheme ASRU dispatch. 328 */ 329 { "fault.cpu.*", FM_FMRI_SCHEME_CPU, FM_CPU_SCHEME_VERSION, 330 cma_cpu_retire }, 331 #endif 332 { NULL, NULL, 0, NULL } 333 }; 334 335 static const cma_subscriber_t * 336 nvl2subr(fmd_hdl_t *hdl, nvlist_t *nvl, nvlist_t **asrup) 337 { 338 const cma_subscriber_t *sp; 339 nvlist_t *asru; 340 char *scheme; 341 uint8_t version; 342 boolean_t retire; 343 344 if (nvlist_lookup_boolean_value(nvl, FM_SUSPECT_RETIRE, &retire) == 0 && 345 retire == 0) { 346 fmd_hdl_debug(hdl, "cma_recv: retire suppressed"); 347 return (NULL); 348 } 349 350 if (nvlist_lookup_nvlist(nvl, FM_FAULT_ASRU, &asru) != 0 || 351 nvlist_lookup_string(asru, FM_FMRI_SCHEME, &scheme) != 0 || 352 nvlist_lookup_uint8(asru, FM_VERSION, &version) != 0) { 353 cma_stats.bad_flts.fmds_value.ui64++; 354 return (NULL); 355 } 356 357 for (sp = cma_subrs; sp->subr_class != NULL; sp++) { 358 if (fmd_nvl_class_match(hdl, nvl, sp->subr_class) && 359 strcmp(scheme, sp->subr_sname) == 0 && 360 version <= sp->subr_svers) { 361 *asrup = asru; 362 return (sp); 363 } 364 } 365 366 cma_stats.nop_flts.fmds_value.ui64++; 367 return (NULL); 368 } 369 370 static void 371 cma_recv_list(fmd_hdl_t *hdl, nvlist_t *nvl, const char *class) 372 { 373 char *uuid = NULL; 374 nvlist_t **nva; 375 uint_t nvc = 0; 376 uint_t keepopen; 377 int err = 0; 378 nvlist_t *asru = NULL; 379 #ifndef i386 380 uint32_t index; 381 #endif 382 383 err |= nvlist_lookup_string(nvl, FM_SUSPECT_UUID, &uuid); 384 err |= nvlist_lookup_nvlist_array(nvl, FM_SUSPECT_FAULT_LIST, 385 &nva, &nvc); 386 if (err != 0) { 387 cma_stats.bad_flts.fmds_value.ui64++; 388 return; 389 } 390 391 keepopen = nvc; 392 while (nvc-- != 0 && (strcmp(class, FM_LIST_SUSPECT_CLASS) != 0 || 393 !fmd_case_uuclosed(hdl, uuid))) { 394 nvlist_t *nvl = *nva++; 395 const cma_subscriber_t *subr; 396 int has_fault; 397 398 if ((subr = nvl2subr(hdl, nvl, &asru)) == NULL) 399 continue; 400 401 /* 402 * A handler returns CMA_RA_SUCCESS to indicate that 403 * from this suspects point-of-view the case may be 404 * closed, CMA_RA_FAILURE otherwise. 405 * A handler must not close the case itself. 406 */ 407 if (subr->subr_func != NULL) { 408 has_fault = fmd_nvl_fmri_has_fault(hdl, asru, 409 FMD_HAS_FAULT_ASRU, NULL); 410 if (strcmp(class, FM_LIST_SUSPECT_CLASS) == 0) { 411 if (has_fault == 1) 412 err = subr->subr_func(hdl, nvl, asru, 413 uuid, 0); 414 } else { 415 if (has_fault == 0) 416 err = subr->subr_func(hdl, nvl, asru, 417 uuid, 1); 418 } 419 if (err == CMA_RA_SUCCESS) 420 keepopen--; 421 } 422 } 423 424 #ifndef i386 425 /* 426 * Do not close the case if we are handling cache faults. 427 */ 428 if (asru != NULL) { 429 if (nvlist_lookup_uint32(asru, FM_FMRI_CPU_CACHE_INDEX, 430 &index) != 0) { 431 if (!keepopen && strcmp(class, 432 FM_LIST_SUSPECT_CLASS) == 0) { 433 fmd_case_uuclose(hdl, uuid); 434 } 435 } 436 } 437 #endif 438 439 if (!keepopen && strcmp(class, FM_LIST_REPAIRED_CLASS) == 0) 440 fmd_case_uuresolved(hdl, uuid); 441 } 442 443 static void 444 cma_recv_one(fmd_hdl_t *hdl, nvlist_t *nvl) 445 { 446 const cma_subscriber_t *subr; 447 nvlist_t *asru; 448 449 if ((subr = nvl2subr(hdl, nvl, &asru)) == NULL) 450 return; 451 452 if (subr->subr_func != NULL) { 453 if (fmd_nvl_fmri_has_fault(hdl, asru, 454 FMD_HAS_FAULT_ASRU, NULL) == 1) 455 (void) subr->subr_func(hdl, nvl, asru, NULL, 0); 456 } 457 } 458 459 /*ARGSUSED*/ 460 static void 461 cma_recv(fmd_hdl_t *hdl, fmd_event_t *ep, nvlist_t *nvl, const char *class) 462 { 463 fmd_hdl_debug(hdl, "received %s\n", class); 464 465 if (strcmp(class, FM_LIST_SUSPECT_CLASS) == 0 || 466 strcmp(class, FM_LIST_REPAIRED_CLASS) == 0 || 467 strcmp(class, FM_LIST_UPDATED_CLASS) == 0) 468 cma_recv_list(hdl, nvl, class); 469 else 470 cma_recv_one(hdl, nvl); 471 } 472 473 /*ARGSUSED*/ 474 static void 475 cma_timeout(fmd_hdl_t *hdl, id_t id, void *arg) 476 { 477 if (id == cma.cma_page_timerid) 478 cma_page_retry(hdl); 479 #ifdef sun4v 480 /* 481 * cpu offline/online needs to be retried on sun4v because 482 * ldom request can be asynchronous. 483 */ 484 else if (id == cma.cma_cpu_timerid) 485 cma_cpu_retry(hdl); 486 #endif 487 } 488 489 #ifdef sun4v 490 static void * 491 cma_init_alloc(size_t size) 492 { 493 return (fmd_hdl_alloc(init_hdl, size, FMD_SLEEP)); 494 } 495 496 static void 497 cma_init_free(void *addr, size_t size) 498 { 499 fmd_hdl_free(init_hdl, addr, size); 500 } 501 #endif 502 503 static const fmd_hdl_ops_t fmd_ops = { 504 cma_recv, /* fmdo_recv */ 505 cma_timeout, /* fmdo_timeout */ 506 NULL, /* fmdo_close */ 507 NULL, /* fmdo_stats */ 508 NULL, /* fmdo_gc */ 509 }; 510 511 static const fmd_prop_t fmd_props[] = { 512 { "cpu_tries", FMD_TYPE_UINT32, "10" }, 513 { "cpu_delay", FMD_TYPE_TIME, "1sec" }, 514 #ifdef sun4v 515 { "cpu_ret_mindelay", FMD_TYPE_TIME, "5sec" }, 516 { "cpu_ret_maxdelay", FMD_TYPE_TIME, "5min" }, 517 #endif /* sun4v */ 518 { "cpu_offline_enable", FMD_TYPE_BOOL, "true" }, 519 { "cpu_online_enable", FMD_TYPE_BOOL, "true" }, 520 { "cpu_forced_offline", FMD_TYPE_BOOL, "true" }, 521 #ifdef opl 522 { "cpu_blacklist_enable", FMD_TYPE_BOOL, "false" }, 523 { "cpu_unblacklist_enable", FMD_TYPE_BOOL, "false" }, 524 #else 525 { "cpu_blacklist_enable", FMD_TYPE_BOOL, "true" }, 526 { "cpu_unblacklist_enable", FMD_TYPE_BOOL, "true" }, 527 #endif /* opl */ 528 { "page_ret_mindelay", FMD_TYPE_TIME, "1sec" }, 529 { "page_ret_maxdelay", FMD_TYPE_TIME, "5min" }, 530 { "page_retire_enable", FMD_TYPE_BOOL, "true" }, 531 { "page_unretire_enable", FMD_TYPE_BOOL, "true" }, 532 { NULL, 0, NULL } 533 }; 534 535 static const fmd_hdl_info_t fmd_info = { 536 "CPU/Memory Retire Agent", CMA_VERSION, &fmd_ops, fmd_props 537 }; 538 539 void 540 _fmd_init(fmd_hdl_t *hdl) 541 { 542 hrtime_t nsec; 543 #ifdef i386 544 char buf[BUFSIZ]; 545 const char *dom0 = "control_d"; 546 547 /* 548 * Abort the cpumem-retire module if Solaris is running under DomU. 549 */ 550 if (sysinfo(SI_PLATFORM, buf, sizeof (buf)) == -1) 551 return; 552 553 if (strncmp(buf, "i86pc", sizeof (buf)) == 0) { 554 cma_is_native = B_TRUE; 555 } else if (strncmp(buf, "i86xpv", sizeof (buf)) != 0) { 556 return; 557 } else { 558 int fd = open("/dev/xen/domcaps", O_RDONLY); 559 560 if (fd != -1) { 561 if (read(fd, buf, sizeof (buf)) <= 0 || 562 strncmp(buf, dom0, strlen(dom0)) != 0) { 563 (void) close(fd); 564 return; 565 } 566 (void) close(fd); 567 } 568 cma_is_native = B_FALSE; 569 } 570 #endif /* i386 */ 571 572 if (fmd_hdl_register(hdl, FMD_API_VERSION, &fmd_info) != 0) 573 return; /* invalid data in configuration file */ 574 575 fmd_hdl_subscribe(hdl, "fault.cpu.*"); 576 fmd_hdl_subscribe(hdl, "fault.memory.*"); 577 #ifdef opl 578 fmd_hdl_subscribe(hdl, "fault.chassis.SPARC-Enterprise.cpu.*"); 579 #endif 580 581 (void) fmd_stat_create(hdl, FMD_STAT_NOALLOC, sizeof (cma_stats) / 582 sizeof (fmd_stat_t), (fmd_stat_t *)&cma_stats); 583 584 cma.cma_cpu_tries = fmd_prop_get_int32(hdl, "cpu_tries"); 585 586 nsec = fmd_prop_get_int64(hdl, "cpu_delay"); 587 cma.cma_cpu_delay.tv_sec = nsec / NANOSEC; 588 cma.cma_cpu_delay.tv_nsec = nsec % NANOSEC; 589 590 cma.cma_page_mindelay = fmd_prop_get_int64(hdl, "page_ret_mindelay"); 591 cma.cma_page_maxdelay = fmd_prop_get_int64(hdl, "page_ret_maxdelay"); 592 593 #ifdef sun4v 594 cma.cma_cpu_mindelay = fmd_prop_get_int64(hdl, "cpu_ret_mindelay"); 595 cma.cma_cpu_maxdelay = fmd_prop_get_int64(hdl, "cpu_ret_maxdelay"); 596 #endif 597 598 cma.cma_cpu_dooffline = fmd_prop_get_int32(hdl, "cpu_offline_enable"); 599 cma.cma_cpu_forcedoffline = fmd_prop_get_int32(hdl, 600 "cpu_forced_offline"); 601 cma.cma_cpu_doonline = fmd_prop_get_int32(hdl, "cpu_online_enable"); 602 cma.cma_cpu_doblacklist = fmd_prop_get_int32(hdl, 603 "cpu_blacklist_enable"); 604 cma.cma_cpu_dounblacklist = fmd_prop_get_int32(hdl, 605 "cpu_unblacklist_enable"); 606 cma.cma_page_doretire = fmd_prop_get_int32(hdl, "page_retire_enable"); 607 cma.cma_page_dounretire = fmd_prop_get_int32(hdl, 608 "page_unretire_enable"); 609 610 if (cma.cma_page_maxdelay < cma.cma_page_mindelay) 611 fmd_hdl_abort(hdl, "page retirement delays conflict\n"); 612 613 #ifdef sun4v 614 init_hdl = hdl; 615 cma_lhp = ldom_init(cma_init_alloc, cma_init_free); 616 #endif 617 } 618 619 void 620 _fmd_fini(fmd_hdl_t *hdl) 621 { 622 #ifdef sun4v 623 ldom_fini(cma_lhp); 624 cma_cpu_fini(hdl); 625 #endif 626 cma_page_fini(hdl); 627 } 628