1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 /* 31 * This file and its contents are supplied under the terms of the 32 * Common Development and Distribution License ("CDDL"), version 1.0. 33 * You may only use this file in accordance with the terms of version 34 * 1.0 of the CDDL. 35 * 36 * A full copy of the text of the CDDL should have accompanied this 37 * source. A copy of the CDDL is also available via the Internet at 38 * http://www.illumos.org/license/CDDL. 39 * 40 * Copyright 2015 Pluribus Networks Inc. 41 * Copyright 2019 Joyent, Inc. 42 * Copyright 2023 Oxide Computer Company 43 */ 44 45 #include <sys/cdefs.h> 46 __FBSDID("$FreeBSD$"); 47 48 #include <sys/param.h> 49 #include <sys/types.h> 50 #include <sys/sysctl.h> 51 #include <sys/errno.h> 52 #include <sys/mman.h> 53 #include <sys/cpuset.h> 54 #include <sys/fp.h> 55 56 #include <stdio.h> 57 #include <stdlib.h> 58 #include <stdbool.h> 59 #include <string.h> 60 #include <unistd.h> 61 #include <libgen.h> 62 #include <libutil.h> 63 #include <fcntl.h> 64 #include <getopt.h> 65 #include <time.h> 66 #include <assert.h> 67 #include <libutil.h> 68 69 #include <machine/cpufunc.h> 70 #include <machine/specialreg.h> 71 #include <machine/vmm.h> 72 #include <machine/vmm_dev.h> 73 #include <sys/vmm_data.h> 74 #include <vmmapi.h> 75 76 #include "amd/vmcb.h" 77 #include "intel/vmcs.h" 78 79 #define MB (1UL << 20) 80 #define GB (1UL << 30) 81 82 #define REQ_ARG required_argument 83 #define NO_ARG no_argument 84 #define OPT_ARG optional_argument 85 86 static const char *progname; 87 88 static void 89 usage(bool cpu_intel) 90 { 91 92 (void)fprintf(stderr, 93 "Usage: %s --vm=<vmname>\n" 94 " [--cpu=<vcpu_number>]\n" 95 " [--create]\n" 96 " [--destroy]\n" 97 " [--pmtmr-port=ioport]\n" 98 " [--wrlock-cycle]\n" 99 " [--get-all]\n" 100 " [--get-stats]\n" 101 " [--set-desc-ds]\n" 102 " [--get-desc-ds]\n" 103 " [--set-desc-es]\n" 104 " [--get-desc-es]\n" 105 " [--set-desc-gs]\n" 106 " [--get-desc-gs]\n" 107 " [--set-desc-fs]\n" 108 " [--get-desc-fs]\n" 109 " [--set-desc-cs]\n" 110 " [--get-desc-cs]\n" 111 " [--set-desc-ss]\n" 112 " [--get-desc-ss]\n" 113 " [--set-desc-tr]\n" 114 " [--get-desc-tr]\n" 115 " [--set-desc-ldtr]\n" 116 " [--get-desc-ldtr]\n" 117 " [--set-desc-gdtr]\n" 118 " [--get-desc-gdtr]\n" 119 " [--set-desc-idtr]\n" 120 " [--get-desc-idtr]\n" 121 " [--run]\n" 122 " [--pause]\n" 123 " [--resume]\n" 124 " [--capname=<capname>]\n" 125 " [--getcap]\n" 126 " [--setcap=<0|1>]\n" 127 " [--desc-base=<BASE>]\n" 128 " [--desc-limit=<LIMIT>]\n" 129 " [--desc-access=<ACCESS>]\n" 130 " [--set-cr0=<CR0>]\n" 131 " [--get-cr0]\n" 132 " [--set-cr2=<CR2>]\n" 133 " [--get-cr2]\n" 134 " [--set-cr3=<CR3>]\n" 135 " [--get-cr3]\n" 136 " [--set-cr4=<CR4>]\n" 137 " [--get-cr4]\n" 138 " [--set-dr0=<DR0>]\n" 139 " [--get-dr0]\n" 140 " [--set-dr1=<DR1>]\n" 141 " [--get-dr1]\n" 142 " [--set-dr2=<DR2>]\n" 143 " [--get-dr2]\n" 144 " [--set-dr3=<DR3>]\n" 145 " [--get-dr3]\n" 146 " [--set-dr6=<DR6>]\n" 147 " [--get-dr6]\n" 148 " [--set-dr7=<DR7>]\n" 149 " [--get-dr7]\n" 150 " [--set-rsp=<RSP>]\n" 151 " [--get-rsp]\n" 152 " [--set-rip=<RIP>]\n" 153 " [--get-rip]\n" 154 " [--get-rax]\n" 155 " [--set-rax=<RAX>]\n" 156 " [--get-rbx]\n" 157 " [--get-rcx]\n" 158 " [--get-rdx]\n" 159 " [--get-rsi]\n" 160 " [--get-rdi]\n" 161 " [--get-rbp]\n" 162 " [--get-r8]\n" 163 " [--get-r9]\n" 164 " [--get-r10]\n" 165 " [--get-r11]\n" 166 " [--get-r12]\n" 167 " [--get-r13]\n" 168 " [--get-r14]\n" 169 " [--get-r15]\n" 170 " [--set-rflags=<RFLAGS>]\n" 171 " [--get-rflags]\n" 172 " [--set-cs]\n" 173 " [--get-cs]\n" 174 " [--set-ds]\n" 175 " [--get-ds]\n" 176 " [--set-es]\n" 177 " [--get-es]\n" 178 " [--set-fs]\n" 179 " [--get-fs]\n" 180 " [--set-gs]\n" 181 " [--get-gs]\n" 182 " [--set-ss]\n" 183 " [--get-ss]\n" 184 " [--get-tr]\n" 185 " [--get-ldtr]\n" 186 " [--set-x2apic-state=<state>]\n" 187 " [--get-x2apic-state]\n" 188 " [--set-mem=<memory in units of MB>]\n" 189 " [--get-lowmem]\n" 190 " [--get-highmem]\n" 191 " [--get-gpa-pmap]\n" 192 " [--assert-lapic-lvt=<pin>]\n" 193 " [--inject-nmi]\n" 194 " [--force-reset]\n" 195 " [--force-poweroff]\n" 196 " [--get-rtc-time]\n" 197 " [--set-rtc-time=<secs>]\n" 198 " [--get-rtc-nvram]\n" 199 " [--set-rtc-nvram=<val>]\n" 200 " [--rtc-nvram-offset=<offset>]\n" 201 " [--get-active-cpus]\n" 202 " [--get-suspended-cpus]\n" 203 " [--get-intinfo]\n" 204 " [--get-eptp]\n" 205 " [--set-exception-bitmap]\n" 206 " [--get-exception-bitmap]\n" 207 " [--get-tsc-offset]\n" 208 " [--get-guest-pat]\n" 209 " [--get-io-bitmap-address]\n" 210 " [--get-msr-bitmap]\n" 211 " [--get-msr-bitmap-address]\n" 212 " [--get-guest-sysenter]\n" 213 " [--get-exit-reason]\n" 214 " [--get-cpu-topology]\n", 215 progname); 216 217 if (cpu_intel) { 218 (void)fprintf(stderr, 219 " [--get-vmcs-pinbased-ctls]\n" 220 " [--get-vmcs-procbased-ctls]\n" 221 " [--get-vmcs-procbased-ctls2]\n" 222 " [--get-vmcs-entry-interruption-info]\n" 223 " [--set-vmcs-entry-interruption-info=<info>]\n" 224 " [--get-vmcs-guest-physical-address\n" 225 " [--get-vmcs-guest-linear-address\n" 226 " [--get-vmcs-host-pat]\n" 227 " [--get-vmcs-host-cr0]\n" 228 " [--get-vmcs-host-cr3]\n" 229 " [--get-vmcs-host-cr4]\n" 230 " [--get-vmcs-host-rip]\n" 231 " [--get-vmcs-host-rsp]\n" 232 " [--get-vmcs-cr0-mask]\n" 233 " [--get-vmcs-cr0-shadow]\n" 234 " [--get-vmcs-cr4-mask]\n" 235 " [--get-vmcs-cr4-shadow]\n" 236 " [--get-vmcs-cr3-targets]\n" 237 " [--get-vmcs-apic-access-address]\n" 238 " [--get-vmcs-virtual-apic-address]\n" 239 " [--get-vmcs-tpr-threshold]\n" 240 " [--get-vmcs-vpid]\n" 241 " [--get-vmcs-instruction-error]\n" 242 " [--get-vmcs-exit-ctls]\n" 243 " [--get-vmcs-entry-ctls]\n" 244 " [--get-vmcs-link]\n" 245 " [--get-vmcs-exit-qualification]\n" 246 " [--get-vmcs-exit-interruption-info]\n" 247 " [--get-vmcs-exit-interruption-error]\n" 248 " [--get-vmcs-interruptibility]\n" 249 ); 250 } else { 251 (void)fprintf(stderr, 252 " [--get-vmcb-intercepts]\n" 253 " [--get-vmcb-asid]\n" 254 " [--get-vmcb-exit-details]\n" 255 " [--get-vmcb-tlb-ctrl]\n" 256 " [--get-vmcb-virq]\n" 257 " [--get-avic-apic-bar]\n" 258 " [--get-avic-backing-page]\n" 259 " [--get-avic-table]\n" 260 ); 261 } 262 exit(1); 263 } 264 265 static int get_rtc_time, set_rtc_time; 266 static int get_rtc_nvram, set_rtc_nvram; 267 static int rtc_nvram_offset; 268 static uint8_t rtc_nvram_value; 269 static time_t rtc_secs; 270 271 static int get_stats, getcap, setcap, capval, get_gpa_pmap; 272 static int inject_nmi, assert_lapic_lvt; 273 static int force_reset, force_poweroff; 274 static const char *capname; 275 static int create, destroy, get_memmap, get_memseg; 276 static int get_intinfo; 277 static int get_active_cpus, get_suspended_cpus; 278 static uint64_t memsize; 279 static int set_cr0, get_cr0, set_cr2, get_cr2, set_cr3, get_cr3; 280 static int set_cr4, get_cr4; 281 static int set_efer, get_efer; 282 static int set_dr0, get_dr0; 283 static int set_dr1, get_dr1; 284 static int set_dr2, get_dr2; 285 static int set_dr3, get_dr3; 286 static int set_dr6, get_dr6; 287 static int set_dr7, get_dr7; 288 static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags; 289 static int set_rax, get_rax; 290 static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp; 291 static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15; 292 static int set_desc_ds, get_desc_ds; 293 static int set_desc_es, get_desc_es; 294 static int set_desc_fs, get_desc_fs; 295 static int set_desc_gs, get_desc_gs; 296 static int set_desc_cs, get_desc_cs; 297 static int set_desc_ss, get_desc_ss; 298 static int set_desc_gdtr, get_desc_gdtr; 299 static int set_desc_idtr, get_desc_idtr; 300 static int set_desc_tr, get_desc_tr; 301 static int set_desc_ldtr, get_desc_ldtr; 302 static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr; 303 static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr; 304 static int set_x2apic_state, get_x2apic_state; 305 enum x2apic_state x2apic_state; 306 static int run; 307 static int do_pause, do_resume; 308 static int get_cpu_topology; 309 static int pmtmr_port; 310 static int wrlock_cycle; 311 static int get_fpu; 312 313 /* 314 * VMCB specific. 315 */ 316 static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl; 317 static int get_vmcb_virq, get_avic_table; 318 319 /* 320 * VMCS-specific fields 321 */ 322 static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2; 323 static int get_eptp, get_io_bitmap, get_tsc_offset; 324 static int get_vmcs_entry_interruption_info, set_vmcs_entry_interruption_info; 325 static int get_vmcs_interruptibility; 326 uint32_t vmcs_entry_interruption_info; 327 static int get_vmcs_gpa, get_vmcs_gla; 328 static int get_exception_bitmap, set_exception_bitmap, exception_bitmap; 329 static int get_cr0_mask, get_cr0_shadow; 330 static int get_cr4_mask, get_cr4_shadow; 331 static int get_cr3_targets; 332 static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold; 333 static int get_msr_bitmap, get_msr_bitmap_address; 334 static int get_guest_msrs; 335 static int get_vpid_asid; 336 static int get_inst_err, get_exit_ctls, get_entry_ctls; 337 static int get_host_cr0, get_host_cr3, get_host_cr4; 338 static int get_host_rip, get_host_rsp; 339 static int get_host_pat; 340 static int get_vmcs_link; 341 static int get_exit_reason, get_vmcs_exit_qualification; 342 static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error; 343 static int get_vmcs_exit_inst_length; 344 345 static uint64_t desc_base; 346 static uint32_t desc_limit, desc_access; 347 348 static int get_all; 349 350 static void 351 dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu) 352 { 353 printf("vm exit[%d]\n", vcpu); 354 printf("\trip\t\t0x%016lx\n", vmexit->rip); 355 printf("\tinst_length\t%d\n", vmexit->inst_length); 356 switch (vmexit->exitcode) { 357 case VM_EXITCODE_INOUT: 358 printf("\treason\t\tINOUT\n"); 359 printf("\tdirection\t%s\n", 360 (vmexit->u.inout.flags & INOUT_IN) ? "IN" : "OUT"); 361 printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes); 362 printf("\tport\t\t0x%04x\n", vmexit->u.inout.port); 363 printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax); 364 break; 365 case VM_EXITCODE_MMIO: 366 printf("\treason\t\tMMIO\n"); 367 printf("\toperation\t%s\n", 368 vmexit->u.mmio.read ? "READ" : "WRITE"); 369 printf("\tbytes\t\t%d\n", vmexit->u.mmio.bytes); 370 printf("\tgpa\t\t0x%08x\n", vmexit->u.mmio.gpa); 371 printf("\tdata\t\t0x%08x\n", vmexit->u.mmio.data); 372 break; 373 case VM_EXITCODE_VMX: 374 printf("\treason\t\tVMX\n"); 375 printf("\tstatus\t\t%d\n", vmexit->u.vmx.status); 376 printf("\texit_reason\t0x%08x (%u)\n", 377 vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason); 378 printf("\tqualification\t0x%016lx\n", 379 vmexit->u.vmx.exit_qualification); 380 printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type); 381 printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error); 382 break; 383 case VM_EXITCODE_SVM: 384 printf("\treason\t\tSVM\n"); 385 printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode); 386 printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1); 387 printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2); 388 break; 389 default: 390 printf("*** unknown vm run exitcode %d\n", vmexit->exitcode); 391 break; 392 } 393 } 394 395 /* AMD 6th generation and Intel compatible MSRs */ 396 #define MSR_AMD6TH_START 0xC0000000 397 #define MSR_AMD6TH_END 0xC0001FFF 398 /* AMD 7th and 8th generation compatible MSRs */ 399 #define MSR_AMD7TH_START 0xC0010000 400 #define MSR_AMD7TH_END 0xC0011FFF 401 402 /* Until a safe method is created, arbitrary VMCS reads/writes are forbidden */ 403 static int 404 vm_get_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t *ret_val) 405 { 406 *ret_val = 0; 407 return (0); 408 } 409 410 static int 411 vm_set_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t val) 412 { 413 return (EINVAL); 414 } 415 416 /* Until a safe method is created, arbitrary VMCB reads/writes are forbidden */ 417 static int 418 vm_get_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 419 uint64_t *ret_val) 420 { 421 *ret_val = 0; 422 return (0); 423 } 424 425 static int 426 vm_set_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes, 427 uint64_t val) 428 { 429 return (EINVAL); 430 } 431 432 enum { 433 VMNAME = 1000, /* avoid collision with return values from getopt */ 434 VCPU, 435 SET_MEM, 436 SET_EFER, 437 SET_CR0, 438 SET_CR2, 439 SET_CR3, 440 SET_CR4, 441 SET_DR0, 442 SET_DR1, 443 SET_DR2, 444 SET_DR3, 445 SET_DR6, 446 SET_DR7, 447 SET_RSP, 448 SET_RIP, 449 SET_RAX, 450 SET_RFLAGS, 451 DESC_BASE, 452 DESC_LIMIT, 453 DESC_ACCESS, 454 SET_CS, 455 SET_DS, 456 SET_ES, 457 SET_FS, 458 SET_GS, 459 SET_SS, 460 SET_TR, 461 SET_LDTR, 462 SET_X2APIC_STATE, 463 SET_EXCEPTION_BITMAP, 464 SET_VMCS_ENTRY_INTERRUPTION_INFO, 465 SET_CAP, 466 CAPNAME, 467 UNASSIGN_PPTDEV, 468 GET_GPA_PMAP, 469 ASSERT_LAPIC_LVT, 470 SET_RTC_TIME, 471 SET_RTC_NVRAM, 472 RTC_NVRAM_OFFSET, 473 PMTMR_PORT, 474 }; 475 476 static void 477 print_cpus(const char *banner, const cpuset_t *cpus) 478 { 479 int i; 480 int first; 481 482 first = 1; 483 printf("%s:\t", banner); 484 if (!CPU_EMPTY(cpus)) { 485 for (i = 0; i < CPU_SETSIZE; i++) { 486 if (CPU_ISSET(i, cpus)) { 487 printf("%s%d", first ? " " : ", ", i); 488 first = 0; 489 } 490 } 491 } else 492 printf(" (none)"); 493 printf("\n"); 494 } 495 496 static void 497 print_intinfo(const char *banner, uint64_t info) 498 { 499 printf("%s:\t", banner); 500 if (VM_INTINFO_PENDING(info)) { 501 switch (VM_INTINFO_TYPE(info)) { 502 case VM_INTINFO_HWINTR: 503 printf("extint"); 504 break; 505 case VM_INTINFO_NMI: 506 printf("nmi"); 507 break; 508 case VM_INTINFO_SWINTR: 509 printf("swint"); 510 break; 511 default: 512 printf("exception"); 513 break; 514 } 515 printf(" vector %hhd", VM_INTINFO_VECTOR(info)); 516 if (VM_INTINFO_HAS_ERRCODE(info)) { 517 printf(" errcode %#x", VM_INTINFO_ERRCODE(info)); 518 } 519 } else { 520 printf("n/a"); 521 } 522 printf("\n"); 523 } 524 525 static bool 526 cpu_vendor_intel(void) 527 { 528 u_int regs[4]; 529 char cpu_vendor[13]; 530 531 do_cpuid(0, regs); 532 ((u_int *)&cpu_vendor)[0] = regs[1]; 533 ((u_int *)&cpu_vendor)[1] = regs[3]; 534 ((u_int *)&cpu_vendor)[2] = regs[2]; 535 cpu_vendor[12] = '\0'; 536 537 if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { 538 return (false); 539 } else if (strcmp(cpu_vendor, "HygonGenuine") == 0) { 540 return (false); 541 } else if (strcmp(cpu_vendor, "GenuineIntel") == 0) { 542 return (true); 543 } else { 544 fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor); 545 exit(1); 546 } 547 } 548 549 static int 550 get_all_registers(struct vmctx *ctx, int vcpu) 551 { 552 uint64_t cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 553 uint64_t rsp, rip, rflags, efer; 554 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp; 555 uint64_t r8, r9, r10, r11, r12, r13, r14, r15; 556 int error = 0; 557 558 if (!error && (get_efer || get_all)) { 559 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_EFER, &efer); 560 if (error == 0) 561 printf("efer[%d]\t\t0x%016lx\n", vcpu, efer); 562 } 563 564 if (!error && (get_cr0 || get_all)) { 565 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR0, &cr0); 566 if (error == 0) 567 printf("cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 568 } 569 570 if (!error && (get_cr2 || get_all)) { 571 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR2, &cr2); 572 if (error == 0) 573 printf("cr2[%d]\t\t0x%016lx\n", vcpu, cr2); 574 } 575 576 if (!error && (get_cr3 || get_all)) { 577 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR3, &cr3); 578 if (error == 0) 579 printf("cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 580 } 581 582 if (!error && (get_cr4 || get_all)) { 583 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR4, &cr4); 584 if (error == 0) 585 printf("cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 586 } 587 588 if (!error && (get_dr0 || get_all)) { 589 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR0, &dr0); 590 if (error == 0) 591 printf("dr0[%d]\t\t0x%016lx\n", vcpu, dr0); 592 } 593 594 if (!error && (get_dr1 || get_all)) { 595 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR1, &dr1); 596 if (error == 0) 597 printf("dr1[%d]\t\t0x%016lx\n", vcpu, dr1); 598 } 599 600 if (!error && (get_dr2 || get_all)) { 601 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR2, &dr2); 602 if (error == 0) 603 printf("dr2[%d]\t\t0x%016lx\n", vcpu, dr2); 604 } 605 606 if (!error && (get_dr3 || get_all)) { 607 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR3, &dr3); 608 if (error == 0) 609 printf("dr3[%d]\t\t0x%016lx\n", vcpu, dr3); 610 } 611 612 if (!error && (get_dr6 || get_all)) { 613 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR6, &dr6); 614 if (error == 0) 615 printf("dr6[%d]\t\t0x%016lx\n", vcpu, dr6); 616 } 617 618 if (!error && (get_dr7 || get_all)) { 619 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR7, &dr7); 620 if (error == 0) 621 printf("dr7[%d]\t\t0x%016lx\n", vcpu, dr7); 622 } 623 624 if (!error && (get_rsp || get_all)) { 625 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSP, &rsp); 626 if (error == 0) 627 printf("rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 628 } 629 630 if (!error && (get_rip || get_all)) { 631 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RIP, &rip); 632 if (error == 0) 633 printf("rip[%d]\t\t0x%016lx\n", vcpu, rip); 634 } 635 636 if (!error && (get_rax || get_all)) { 637 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RAX, &rax); 638 if (error == 0) 639 printf("rax[%d]\t\t0x%016lx\n", vcpu, rax); 640 } 641 642 if (!error && (get_rbx || get_all)) { 643 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBX, &rbx); 644 if (error == 0) 645 printf("rbx[%d]\t\t0x%016lx\n", vcpu, rbx); 646 } 647 648 if (!error && (get_rcx || get_all)) { 649 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RCX, &rcx); 650 if (error == 0) 651 printf("rcx[%d]\t\t0x%016lx\n", vcpu, rcx); 652 } 653 654 if (!error && (get_rdx || get_all)) { 655 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDX, &rdx); 656 if (error == 0) 657 printf("rdx[%d]\t\t0x%016lx\n", vcpu, rdx); 658 } 659 660 if (!error && (get_rsi || get_all)) { 661 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSI, &rsi); 662 if (error == 0) 663 printf("rsi[%d]\t\t0x%016lx\n", vcpu, rsi); 664 } 665 666 if (!error && (get_rdi || get_all)) { 667 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDI, &rdi); 668 if (error == 0) 669 printf("rdi[%d]\t\t0x%016lx\n", vcpu, rdi); 670 } 671 672 if (!error && (get_rbp || get_all)) { 673 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBP, &rbp); 674 if (error == 0) 675 printf("rbp[%d]\t\t0x%016lx\n", vcpu, rbp); 676 } 677 678 if (!error && (get_r8 || get_all)) { 679 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R8, &r8); 680 if (error == 0) 681 printf("r8[%d]\t\t0x%016lx\n", vcpu, r8); 682 } 683 684 if (!error && (get_r9 || get_all)) { 685 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R9, &r9); 686 if (error == 0) 687 printf("r9[%d]\t\t0x%016lx\n", vcpu, r9); 688 } 689 690 if (!error && (get_r10 || get_all)) { 691 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R10, &r10); 692 if (error == 0) 693 printf("r10[%d]\t\t0x%016lx\n", vcpu, r10); 694 } 695 696 if (!error && (get_r11 || get_all)) { 697 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R11, &r11); 698 if (error == 0) 699 printf("r11[%d]\t\t0x%016lx\n", vcpu, r11); 700 } 701 702 if (!error && (get_r12 || get_all)) { 703 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R12, &r12); 704 if (error == 0) 705 printf("r12[%d]\t\t0x%016lx\n", vcpu, r12); 706 } 707 708 if (!error && (get_r13 || get_all)) { 709 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R13, &r13); 710 if (error == 0) 711 printf("r13[%d]\t\t0x%016lx\n", vcpu, r13); 712 } 713 714 if (!error && (get_r14 || get_all)) { 715 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R14, &r14); 716 if (error == 0) 717 printf("r14[%d]\t\t0x%016lx\n", vcpu, r14); 718 } 719 720 if (!error && (get_r15 || get_all)) { 721 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R15, &r15); 722 if (error == 0) 723 printf("r15[%d]\t\t0x%016lx\n", vcpu, r15); 724 } 725 726 if (!error && (get_rflags || get_all)) { 727 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 728 &rflags); 729 if (error == 0) 730 printf("rflags[%d]\t0x%016lx\n", vcpu, rflags); 731 } 732 733 return (error); 734 } 735 736 static int 737 get_all_segments(struct vmctx *ctx, int vcpu) 738 { 739 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 740 int error = 0; 741 742 if (!error && (get_desc_ds || get_all)) { 743 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_DS, 744 &desc_base, &desc_limit, &desc_access); 745 if (error == 0) { 746 printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 747 vcpu, desc_base, desc_limit, desc_access); 748 } 749 } 750 751 if (!error && (get_desc_es || get_all)) { 752 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_ES, 753 &desc_base, &desc_limit, &desc_access); 754 if (error == 0) { 755 printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 756 vcpu, desc_base, desc_limit, desc_access); 757 } 758 } 759 760 if (!error && (get_desc_fs || get_all)) { 761 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_FS, 762 &desc_base, &desc_limit, &desc_access); 763 if (error == 0) { 764 printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 765 vcpu, desc_base, desc_limit, desc_access); 766 } 767 } 768 769 if (!error && (get_desc_gs || get_all)) { 770 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GS, 771 &desc_base, &desc_limit, &desc_access); 772 if (error == 0) { 773 printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 774 vcpu, desc_base, desc_limit, desc_access); 775 } 776 } 777 778 if (!error && (get_desc_ss || get_all)) { 779 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS, 780 &desc_base, &desc_limit, &desc_access); 781 if (error == 0) { 782 printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 783 vcpu, desc_base, desc_limit, desc_access); 784 } 785 } 786 787 if (!error && (get_desc_cs || get_all)) { 788 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_CS, 789 &desc_base, &desc_limit, &desc_access); 790 if (error == 0) { 791 printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 792 vcpu, desc_base, desc_limit, desc_access); 793 } 794 } 795 796 if (!error && (get_desc_tr || get_all)) { 797 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR, 798 &desc_base, &desc_limit, &desc_access); 799 if (error == 0) { 800 printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 801 vcpu, desc_base, desc_limit, desc_access); 802 } 803 } 804 805 if (!error && (get_desc_ldtr || get_all)) { 806 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 807 &desc_base, &desc_limit, &desc_access); 808 if (error == 0) { 809 printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n", 810 vcpu, desc_base, desc_limit, desc_access); 811 } 812 } 813 814 if (!error && (get_desc_gdtr || get_all)) { 815 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 816 &desc_base, &desc_limit, &desc_access); 817 if (error == 0) { 818 printf("gdtr[%d]\t\t0x%016lx/0x%08x\n", 819 vcpu, desc_base, desc_limit); 820 } 821 } 822 823 if (!error && (get_desc_idtr || get_all)) { 824 error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 825 &desc_base, &desc_limit, &desc_access); 826 if (error == 0) { 827 printf("idtr[%d]\t\t0x%016lx/0x%08x\n", 828 vcpu, desc_base, desc_limit); 829 } 830 } 831 832 if (!error && (get_cs || get_all)) { 833 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CS, &cs); 834 if (error == 0) 835 printf("cs[%d]\t\t0x%04lx\n", vcpu, cs); 836 } 837 838 if (!error && (get_ds || get_all)) { 839 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DS, &ds); 840 if (error == 0) 841 printf("ds[%d]\t\t0x%04lx\n", vcpu, ds); 842 } 843 844 if (!error && (get_es || get_all)) { 845 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_ES, &es); 846 if (error == 0) 847 printf("es[%d]\t\t0x%04lx\n", vcpu, es); 848 } 849 850 if (!error && (get_fs || get_all)) { 851 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_FS, &fs); 852 if (error == 0) 853 printf("fs[%d]\t\t0x%04lx\n", vcpu, fs); 854 } 855 856 if (!error && (get_gs || get_all)) { 857 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_GS, &gs); 858 if (error == 0) 859 printf("gs[%d]\t\t0x%04lx\n", vcpu, gs); 860 } 861 862 if (!error && (get_ss || get_all)) { 863 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_SS, &ss); 864 if (error == 0) 865 printf("ss[%d]\t\t0x%04lx\n", vcpu, ss); 866 } 867 868 if (!error && (get_tr || get_all)) { 869 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_TR, &tr); 870 if (error == 0) 871 printf("tr[%d]\t\t0x%04lx\n", vcpu, tr); 872 } 873 874 if (!error && (get_ldtr || get_all)) { 875 error = vm_get_register(ctx, vcpu, VM_REG_GUEST_LDTR, &ldtr); 876 if (error == 0) 877 printf("ldtr[%d]\t\t0x%04lx\n", vcpu, ldtr); 878 } 879 880 return (error); 881 } 882 883 static int 884 get_misc_vmcs(struct vmctx *ctx, int vcpu) 885 { 886 uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64; 887 int error = 0; 888 889 if (!error && (get_cr0_mask || get_all)) { 890 uint64_t cr0mask; 891 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_MASK, &cr0mask); 892 if (error == 0) 893 printf("cr0_mask[%d]\t\t0x%016lx\n", vcpu, cr0mask); 894 } 895 896 if (!error && (get_cr0_shadow || get_all)) { 897 uint64_t cr0shadow; 898 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_SHADOW, 899 &cr0shadow); 900 if (error == 0) 901 printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpu, cr0shadow); 902 } 903 904 if (!error && (get_cr4_mask || get_all)) { 905 uint64_t cr4mask; 906 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_MASK, &cr4mask); 907 if (error == 0) 908 printf("cr4_mask[%d]\t\t0x%016lx\n", vcpu, cr4mask); 909 } 910 911 if (!error && (get_cr4_shadow || get_all)) { 912 uint64_t cr4shadow; 913 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_SHADOW, 914 &cr4shadow); 915 if (error == 0) 916 printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpu, cr4shadow); 917 } 918 919 if (!error && (get_cr3_targets || get_all)) { 920 uint64_t target_count, target_addr; 921 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET_COUNT, 922 &target_count); 923 if (error == 0) { 924 printf("cr3_target_count[%d]\t0x%016lx\n", 925 vcpu, target_count); 926 } 927 928 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET0, 929 &target_addr); 930 if (error == 0) { 931 printf("cr3_target0[%d]\t\t0x%016lx\n", 932 vcpu, target_addr); 933 } 934 935 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET1, 936 &target_addr); 937 if (error == 0) { 938 printf("cr3_target1[%d]\t\t0x%016lx\n", 939 vcpu, target_addr); 940 } 941 942 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET2, 943 &target_addr); 944 if (error == 0) { 945 printf("cr3_target2[%d]\t\t0x%016lx\n", 946 vcpu, target_addr); 947 } 948 949 error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET3, 950 &target_addr); 951 if (error == 0) { 952 printf("cr3_target3[%d]\t\t0x%016lx\n", 953 vcpu, target_addr); 954 } 955 } 956 957 if (!error && (get_pinbased_ctls || get_all)) { 958 error = vm_get_vmcs_field(ctx, vcpu, VMCS_PIN_BASED_CTLS, &ctl); 959 if (error == 0) 960 printf("pinbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 961 } 962 963 if (!error && (get_procbased_ctls || get_all)) { 964 error = vm_get_vmcs_field(ctx, vcpu, 965 VMCS_PRI_PROC_BASED_CTLS, &ctl); 966 if (error == 0) 967 printf("procbased_ctls[%d]\t0x%016lx\n", vcpu, ctl); 968 } 969 970 if (!error && (get_procbased_ctls2 || get_all)) { 971 error = vm_get_vmcs_field(ctx, vcpu, 972 VMCS_SEC_PROC_BASED_CTLS, &ctl); 973 if (error == 0) 974 printf("procbased_ctls2[%d]\t0x%016lx\n", vcpu, ctl); 975 } 976 977 if (!error && (get_vmcs_gla || get_all)) { 978 error = vm_get_vmcs_field(ctx, vcpu, 979 VMCS_GUEST_LINEAR_ADDRESS, &u64); 980 if (error == 0) 981 printf("gla[%d]\t\t0x%016lx\n", vcpu, u64); 982 } 983 984 if (!error && (get_vmcs_gpa || get_all)) { 985 error = vm_get_vmcs_field(ctx, vcpu, 986 VMCS_GUEST_PHYSICAL_ADDRESS, &u64); 987 if (error == 0) 988 printf("gpa[%d]\t\t0x%016lx\n", vcpu, u64); 989 } 990 991 if (!error && (get_vmcs_entry_interruption_info || 992 get_all)) { 993 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,&u64); 994 if (error == 0) { 995 printf("entry_interruption_info[%d]\t0x%016lx\n", 996 vcpu, u64); 997 } 998 } 999 1000 if (!error && (get_tpr_threshold || get_all)) { 1001 uint64_t threshold; 1002 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TPR_THRESHOLD, 1003 &threshold); 1004 if (error == 0) 1005 printf("tpr_threshold[%d]\t0x%016lx\n", vcpu, threshold); 1006 } 1007 1008 if (!error && (get_inst_err || get_all)) { 1009 uint64_t insterr; 1010 error = vm_get_vmcs_field(ctx, vcpu, VMCS_INSTRUCTION_ERROR, 1011 &insterr); 1012 if (error == 0) { 1013 printf("instruction_error[%d]\t0x%016lx\n", 1014 vcpu, insterr); 1015 } 1016 } 1017 1018 if (!error && (get_exit_ctls || get_all)) { 1019 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_CTLS, &ctl); 1020 if (error == 0) 1021 printf("exit_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1022 } 1023 1024 if (!error && (get_entry_ctls || get_all)) { 1025 error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_CTLS, &ctl); 1026 if (error == 0) 1027 printf("entry_ctls[%d]\t\t0x%016lx\n", vcpu, ctl); 1028 } 1029 1030 if (!error && (get_host_pat || get_all)) { 1031 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_IA32_PAT, &pat); 1032 if (error == 0) 1033 printf("host_pat[%d]\t\t0x%016lx\n", vcpu, pat); 1034 } 1035 1036 if (!error && (get_host_cr0 || get_all)) { 1037 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR0, &cr0); 1038 if (error == 0) 1039 printf("host_cr0[%d]\t\t0x%016lx\n", vcpu, cr0); 1040 } 1041 1042 if (!error && (get_host_cr3 || get_all)) { 1043 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR3, &cr3); 1044 if (error == 0) 1045 printf("host_cr3[%d]\t\t0x%016lx\n", vcpu, cr3); 1046 } 1047 1048 if (!error && (get_host_cr4 || get_all)) { 1049 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR4, &cr4); 1050 if (error == 0) 1051 printf("host_cr4[%d]\t\t0x%016lx\n", vcpu, cr4); 1052 } 1053 1054 if (!error && (get_host_rip || get_all)) { 1055 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RIP, &rip); 1056 if (error == 0) 1057 printf("host_rip[%d]\t\t0x%016lx\n", vcpu, rip); 1058 } 1059 1060 if (!error && (get_host_rsp || get_all)) { 1061 error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RSP, &rsp); 1062 if (error == 0) 1063 printf("host_rsp[%d]\t\t0x%016lx\n", vcpu, rsp); 1064 } 1065 1066 if (!error && (get_vmcs_link || get_all)) { 1067 error = vm_get_vmcs_field(ctx, vcpu, VMCS_LINK_POINTER, &addr); 1068 if (error == 0) 1069 printf("vmcs_pointer[%d]\t0x%016lx\n", vcpu, addr); 1070 } 1071 1072 if (!error && (get_vmcs_exit_interruption_info || get_all)) { 1073 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_INFO, &u64); 1074 if (error == 0) { 1075 printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n", 1076 vcpu, u64); 1077 } 1078 } 1079 1080 if (!error && (get_vmcs_exit_interruption_error || get_all)) { 1081 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_ERRCODE, 1082 &u64); 1083 if (error == 0) { 1084 printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n", 1085 vcpu, u64); 1086 } 1087 } 1088 1089 if (!error && (get_vmcs_interruptibility || get_all)) { 1090 error = vm_get_vmcs_field(ctx, vcpu, 1091 VMCS_GUEST_INTERRUPTIBILITY, &u64); 1092 if (error == 0) { 1093 printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n", 1094 vcpu, u64); 1095 } 1096 } 1097 1098 if (!error && (get_vmcs_exit_inst_length || get_all)) { 1099 error = vm_get_vmcs_field(ctx, vcpu, 1100 VMCS_EXIT_INSTRUCTION_LENGTH, &u64); 1101 if (error == 0) 1102 printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu, 1103 (uint32_t)u64); 1104 } 1105 1106 if (!error && (get_vmcs_exit_qualification || get_all)) { 1107 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION, 1108 &u64); 1109 if (error == 0) 1110 printf("vmcs_exit_qualification[%d]\t0x%016lx\n", 1111 vcpu, u64); 1112 } 1113 1114 return (error); 1115 } 1116 1117 static int 1118 get_misc_vmcb(struct vmctx *ctx, int vcpu) 1119 { 1120 uint64_t ctl, addr; 1121 int error = 0; 1122 1123 if (!error && (get_vmcb_intercept || get_all)) { 1124 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_CR_INTERCEPT, 4, 1125 &ctl); 1126 if (error == 0) 1127 printf("cr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1128 1129 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_DR_INTERCEPT, 4, 1130 &ctl); 1131 if (error == 0) 1132 printf("dr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1133 1134 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXC_INTERCEPT, 4, 1135 &ctl); 1136 if (error == 0) 1137 printf("exc_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1138 1139 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST1_INTERCEPT, 1140 4, &ctl); 1141 if (error == 0) 1142 printf("inst1_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1143 1144 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST2_INTERCEPT, 1145 4, &ctl); 1146 if (error == 0) 1147 printf("inst2_intercept[%d]\t0x%08x\n", vcpu, (int)ctl); 1148 } 1149 1150 if (!error && (get_vmcb_tlb_ctrl || get_all)) { 1151 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_TLB_CTRL, 1152 4, &ctl); 1153 if (error == 0) 1154 printf("TLB ctrl[%d]\t0x%016lx\n", vcpu, ctl); 1155 } 1156 1157 if (!error && (get_vmcb_exit_details || get_all)) { 1158 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO1, 1159 8, &ctl); 1160 if (error == 0) 1161 printf("exitinfo1[%d]\t0x%016lx\n", vcpu, ctl); 1162 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO2, 1163 8, &ctl); 1164 if (error == 0) 1165 printf("exitinfo2[%d]\t0x%016lx\n", vcpu, ctl); 1166 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINTINFO, 1167 8, &ctl); 1168 if (error == 0) 1169 printf("exitintinfo[%d]\t0x%016lx\n", vcpu, ctl); 1170 } 1171 1172 if (!error && (get_vmcb_virq || get_all)) { 1173 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_VIRQ, 1174 8, &ctl); 1175 if (error == 0) 1176 printf("v_irq/tpr[%d]\t0x%016lx\n", vcpu, ctl); 1177 } 1178 1179 if (!error && (get_apic_access_addr || get_all)) { 1180 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_BAR, 8, 1181 &addr); 1182 if (error == 0) 1183 printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpu, addr); 1184 } 1185 1186 if (!error && (get_virtual_apic_addr || get_all)) { 1187 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PAGE, 8, 1188 &addr); 1189 if (error == 0) 1190 printf("AVIC backing page[%d]\t0x%016lx\n", vcpu, addr); 1191 } 1192 1193 if (!error && (get_avic_table || get_all)) { 1194 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_LT, 8, 1195 &addr); 1196 if (error == 0) 1197 printf("AVIC logical table[%d]\t0x%016lx\n", 1198 vcpu, addr); 1199 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PT, 8, 1200 &addr); 1201 if (error == 0) 1202 printf("AVIC physical table[%d]\t0x%016lx\n", 1203 vcpu, addr); 1204 } 1205 1206 return (error); 1207 } 1208 1209 static struct option * 1210 setup_options(bool cpu_intel) 1211 { 1212 const struct option common_opts[] = { 1213 { "vm", REQ_ARG, 0, VMNAME }, 1214 { "cpu", REQ_ARG, 0, VCPU }, 1215 { "set-mem", REQ_ARG, 0, SET_MEM }, 1216 { "set-efer", REQ_ARG, 0, SET_EFER }, 1217 { "set-cr0", REQ_ARG, 0, SET_CR0 }, 1218 { "set-cr2", REQ_ARG, 0, SET_CR2 }, 1219 { "set-cr3", REQ_ARG, 0, SET_CR3 }, 1220 { "set-cr4", REQ_ARG, 0, SET_CR4 }, 1221 { "set-dr0", REQ_ARG, 0, SET_DR0 }, 1222 { "set-dr1", REQ_ARG, 0, SET_DR1 }, 1223 { "set-dr2", REQ_ARG, 0, SET_DR2 }, 1224 { "set-dr3", REQ_ARG, 0, SET_DR3 }, 1225 { "set-dr6", REQ_ARG, 0, SET_DR6 }, 1226 { "set-dr7", REQ_ARG, 0, SET_DR7 }, 1227 { "set-rsp", REQ_ARG, 0, SET_RSP }, 1228 { "set-rip", REQ_ARG, 0, SET_RIP }, 1229 { "set-rax", REQ_ARG, 0, SET_RAX }, 1230 { "set-rflags", REQ_ARG, 0, SET_RFLAGS }, 1231 { "desc-base", REQ_ARG, 0, DESC_BASE }, 1232 { "desc-limit", REQ_ARG, 0, DESC_LIMIT }, 1233 { "desc-access",REQ_ARG, 0, DESC_ACCESS }, 1234 { "set-cs", REQ_ARG, 0, SET_CS }, 1235 { "set-ds", REQ_ARG, 0, SET_DS }, 1236 { "set-es", REQ_ARG, 0, SET_ES }, 1237 { "set-fs", REQ_ARG, 0, SET_FS }, 1238 { "set-gs", REQ_ARG, 0, SET_GS }, 1239 { "set-ss", REQ_ARG, 0, SET_SS }, 1240 { "set-tr", REQ_ARG, 0, SET_TR }, 1241 { "set-ldtr", REQ_ARG, 0, SET_LDTR }, 1242 { "set-x2apic-state",REQ_ARG, 0, SET_X2APIC_STATE }, 1243 { "set-exception-bitmap", 1244 REQ_ARG, 0, SET_EXCEPTION_BITMAP }, 1245 { "capname", REQ_ARG, 0, CAPNAME }, 1246 { "unassign-pptdev", REQ_ARG, 0, UNASSIGN_PPTDEV }, 1247 { "setcap", REQ_ARG, 0, SET_CAP }, 1248 { "get-gpa-pmap", REQ_ARG, 0, GET_GPA_PMAP }, 1249 { "assert-lapic-lvt", REQ_ARG, 0, ASSERT_LAPIC_LVT }, 1250 { "get-rtc-time", NO_ARG, &get_rtc_time, 1 }, 1251 { "set-rtc-time", REQ_ARG, 0, SET_RTC_TIME }, 1252 { "rtc-nvram-offset", REQ_ARG, 0, RTC_NVRAM_OFFSET }, 1253 { "get-rtc-nvram", NO_ARG, &get_rtc_nvram, 1 }, 1254 { "set-rtc-nvram", REQ_ARG, 0, SET_RTC_NVRAM }, 1255 { "getcap", NO_ARG, &getcap, 1 }, 1256 { "get-stats", NO_ARG, &get_stats, 1 }, 1257 { "get-desc-ds",NO_ARG, &get_desc_ds, 1 }, 1258 { "set-desc-ds",NO_ARG, &set_desc_ds, 1 }, 1259 { "get-desc-es",NO_ARG, &get_desc_es, 1 }, 1260 { "set-desc-es",NO_ARG, &set_desc_es, 1 }, 1261 { "get-desc-ss",NO_ARG, &get_desc_ss, 1 }, 1262 { "set-desc-ss",NO_ARG, &set_desc_ss, 1 }, 1263 { "get-desc-cs",NO_ARG, &get_desc_cs, 1 }, 1264 { "set-desc-cs",NO_ARG, &set_desc_cs, 1 }, 1265 { "get-desc-fs",NO_ARG, &get_desc_fs, 1 }, 1266 { "set-desc-fs",NO_ARG, &set_desc_fs, 1 }, 1267 { "get-desc-gs",NO_ARG, &get_desc_gs, 1 }, 1268 { "set-desc-gs",NO_ARG, &set_desc_gs, 1 }, 1269 { "get-desc-tr",NO_ARG, &get_desc_tr, 1 }, 1270 { "set-desc-tr",NO_ARG, &set_desc_tr, 1 }, 1271 { "set-desc-ldtr", NO_ARG, &set_desc_ldtr, 1 }, 1272 { "get-desc-ldtr", NO_ARG, &get_desc_ldtr, 1 }, 1273 { "set-desc-gdtr", NO_ARG, &set_desc_gdtr, 1 }, 1274 { "get-desc-gdtr", NO_ARG, &get_desc_gdtr, 1 }, 1275 { "set-desc-idtr", NO_ARG, &set_desc_idtr, 1 }, 1276 { "get-desc-idtr", NO_ARG, &get_desc_idtr, 1 }, 1277 { "get-memmap", NO_ARG, &get_memmap, 1 }, 1278 { "get-memseg", NO_ARG, &get_memseg, 1 }, 1279 { "get-efer", NO_ARG, &get_efer, 1 }, 1280 { "get-cr0", NO_ARG, &get_cr0, 1 }, 1281 { "get-cr2", NO_ARG, &get_cr2, 1 }, 1282 { "get-cr3", NO_ARG, &get_cr3, 1 }, 1283 { "get-cr4", NO_ARG, &get_cr4, 1 }, 1284 { "get-dr0", NO_ARG, &get_dr0, 1 }, 1285 { "get-dr1", NO_ARG, &get_dr1, 1 }, 1286 { "get-dr2", NO_ARG, &get_dr2, 1 }, 1287 { "get-dr3", NO_ARG, &get_dr3, 1 }, 1288 { "get-dr6", NO_ARG, &get_dr6, 1 }, 1289 { "get-dr7", NO_ARG, &get_dr7, 1 }, 1290 { "get-rsp", NO_ARG, &get_rsp, 1 }, 1291 { "get-rip", NO_ARG, &get_rip, 1 }, 1292 { "get-rax", NO_ARG, &get_rax, 1 }, 1293 { "get-rbx", NO_ARG, &get_rbx, 1 }, 1294 { "get-rcx", NO_ARG, &get_rcx, 1 }, 1295 { "get-rdx", NO_ARG, &get_rdx, 1 }, 1296 { "get-rsi", NO_ARG, &get_rsi, 1 }, 1297 { "get-rdi", NO_ARG, &get_rdi, 1 }, 1298 { "get-rbp", NO_ARG, &get_rbp, 1 }, 1299 { "get-r8", NO_ARG, &get_r8, 1 }, 1300 { "get-r9", NO_ARG, &get_r9, 1 }, 1301 { "get-r10", NO_ARG, &get_r10, 1 }, 1302 { "get-r11", NO_ARG, &get_r11, 1 }, 1303 { "get-r12", NO_ARG, &get_r12, 1 }, 1304 { "get-r13", NO_ARG, &get_r13, 1 }, 1305 { "get-r14", NO_ARG, &get_r14, 1 }, 1306 { "get-r15", NO_ARG, &get_r15, 1 }, 1307 { "get-rflags", NO_ARG, &get_rflags, 1 }, 1308 { "get-cs", NO_ARG, &get_cs, 1 }, 1309 { "get-ds", NO_ARG, &get_ds, 1 }, 1310 { "get-es", NO_ARG, &get_es, 1 }, 1311 { "get-fs", NO_ARG, &get_fs, 1 }, 1312 { "get-gs", NO_ARG, &get_gs, 1 }, 1313 { "get-ss", NO_ARG, &get_ss, 1 }, 1314 { "get-tr", NO_ARG, &get_tr, 1 }, 1315 { "get-ldtr", NO_ARG, &get_ldtr, 1 }, 1316 { "get-eptp", NO_ARG, &get_eptp, 1 }, 1317 { "get-exception-bitmap", 1318 NO_ARG, &get_exception_bitmap, 1 }, 1319 { "get-io-bitmap-address", 1320 NO_ARG, &get_io_bitmap, 1 }, 1321 { "get-tsc-offset", NO_ARG, &get_tsc_offset, 1 }, 1322 { "get-msr-bitmap", 1323 NO_ARG, &get_msr_bitmap, 1 }, 1324 { "get-msr-bitmap-address", 1325 NO_ARG, &get_msr_bitmap_address, 1 }, 1326 { "get-guest-msrs", NO_ARG, &get_guest_msrs, 1 }, 1327 { "get-exit-reason", 1328 NO_ARG, &get_exit_reason, 1 }, 1329 { "get-x2apic-state", NO_ARG, &get_x2apic_state, 1 }, 1330 { "get-all", NO_ARG, &get_all, 1 }, 1331 { "run", NO_ARG, &run, 1 }, 1332 { "pause", NO_ARG, &do_pause, 1 }, 1333 { "resume", NO_ARG, &do_resume, 1 }, 1334 { "create", NO_ARG, &create, 1 }, 1335 { "destroy", NO_ARG, &destroy, 1 }, 1336 { "inject-nmi", NO_ARG, &inject_nmi, 1 }, 1337 { "force-reset", NO_ARG, &force_reset, 1 }, 1338 { "force-poweroff", NO_ARG, &force_poweroff, 1 }, 1339 { "get-active-cpus", NO_ARG, &get_active_cpus, 1 }, 1340 { "get-suspended-cpus", NO_ARG, &get_suspended_cpus, 1 }, 1341 { "get-intinfo", NO_ARG, &get_intinfo, 1 }, 1342 { "get-cpu-topology", NO_ARG, &get_cpu_topology, 1 }, 1343 { "pmtmr-port", REQ_ARG, 0, PMTMR_PORT }, 1344 { "wrlock-cycle", NO_ARG, &wrlock_cycle, 1 }, 1345 { "get-fpu", NO_ARG, &get_fpu, 1 }, 1346 }; 1347 1348 const struct option intel_opts[] = { 1349 { "get-vmcs-pinbased-ctls", 1350 NO_ARG, &get_pinbased_ctls, 1 }, 1351 { "get-vmcs-procbased-ctls", 1352 NO_ARG, &get_procbased_ctls, 1 }, 1353 { "get-vmcs-procbased-ctls2", 1354 NO_ARG, &get_procbased_ctls2, 1 }, 1355 { "get-vmcs-guest-linear-address", 1356 NO_ARG, &get_vmcs_gla, 1 }, 1357 { "get-vmcs-guest-physical-address", 1358 NO_ARG, &get_vmcs_gpa, 1 }, 1359 { "get-vmcs-entry-interruption-info", 1360 NO_ARG, &get_vmcs_entry_interruption_info, 1}, 1361 { "get-vmcs-cr0-mask", NO_ARG, &get_cr0_mask, 1 }, 1362 { "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 }, 1363 { "get-vmcs-cr4-mask", NO_ARG, &get_cr4_mask, 1 }, 1364 { "get-vmcs-cr4-shadow", NO_ARG, &get_cr4_shadow, 1 }, 1365 { "get-vmcs-cr3-targets", NO_ARG, &get_cr3_targets, 1 }, 1366 { "get-vmcs-tpr-threshold", 1367 NO_ARG, &get_tpr_threshold, 1 }, 1368 { "get-vmcs-vpid", NO_ARG, &get_vpid_asid, 1 }, 1369 { "get-vmcs-exit-ctls", NO_ARG, &get_exit_ctls, 1 }, 1370 { "get-vmcs-entry-ctls", 1371 NO_ARG, &get_entry_ctls, 1 }, 1372 { "get-vmcs-instruction-error", 1373 NO_ARG, &get_inst_err, 1 }, 1374 { "get-vmcs-host-pat", NO_ARG, &get_host_pat, 1 }, 1375 { "get-vmcs-host-cr0", 1376 NO_ARG, &get_host_cr0, 1 }, 1377 { "set-vmcs-entry-interruption-info", 1378 REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO }, 1379 { "get-vmcs-exit-qualification", 1380 NO_ARG, &get_vmcs_exit_qualification, 1 }, 1381 { "get-vmcs-exit-inst-length", 1382 NO_ARG, &get_vmcs_exit_inst_length, 1 }, 1383 { "get-vmcs-interruptibility", 1384 NO_ARG, &get_vmcs_interruptibility, 1 }, 1385 { "get-vmcs-exit-interruption-error", 1386 NO_ARG, &get_vmcs_exit_interruption_error, 1 }, 1387 { "get-vmcs-exit-interruption-info", 1388 NO_ARG, &get_vmcs_exit_interruption_info, 1 }, 1389 { "get-vmcs-link", NO_ARG, &get_vmcs_link, 1 }, 1390 { "get-vmcs-host-cr3", 1391 NO_ARG, &get_host_cr3, 1 }, 1392 { "get-vmcs-host-cr4", 1393 NO_ARG, &get_host_cr4, 1 }, 1394 { "get-vmcs-host-rip", 1395 NO_ARG, &get_host_rip, 1 }, 1396 { "get-vmcs-host-rsp", 1397 NO_ARG, &get_host_rsp, 1 }, 1398 { "get-apic-access-address", 1399 NO_ARG, &get_apic_access_addr, 1}, 1400 { "get-virtual-apic-address", 1401 NO_ARG, &get_virtual_apic_addr, 1} 1402 }; 1403 1404 const struct option amd_opts[] = { 1405 { "get-vmcb-intercepts", 1406 NO_ARG, &get_vmcb_intercept, 1 }, 1407 { "get-vmcb-asid", 1408 NO_ARG, &get_vpid_asid, 1 }, 1409 { "get-vmcb-exit-details", 1410 NO_ARG, &get_vmcb_exit_details, 1 }, 1411 { "get-vmcb-tlb-ctrl", 1412 NO_ARG, &get_vmcb_tlb_ctrl, 1 }, 1413 { "get-vmcb-virq", 1414 NO_ARG, &get_vmcb_virq, 1 }, 1415 { "get-avic-apic-bar", 1416 NO_ARG, &get_apic_access_addr, 1 }, 1417 { "get-avic-backing-page", 1418 NO_ARG, &get_virtual_apic_addr, 1 }, 1419 { "get-avic-table", 1420 NO_ARG, &get_avic_table, 1 } 1421 }; 1422 1423 const struct option null_opt = { 1424 NULL, 0, NULL, 0 1425 }; 1426 1427 struct option *all_opts; 1428 char *cp; 1429 int optlen; 1430 1431 optlen = sizeof(common_opts); 1432 1433 if (cpu_intel) 1434 optlen += sizeof(intel_opts); 1435 else 1436 optlen += sizeof(amd_opts); 1437 1438 optlen += sizeof(null_opt); 1439 1440 all_opts = malloc(optlen); 1441 1442 cp = (char *)all_opts; 1443 memcpy(cp, common_opts, sizeof(common_opts)); 1444 cp += sizeof(common_opts); 1445 1446 if (cpu_intel) { 1447 memcpy(cp, intel_opts, sizeof(intel_opts)); 1448 cp += sizeof(intel_opts); 1449 } else { 1450 memcpy(cp, amd_opts, sizeof(amd_opts)); 1451 cp += sizeof(amd_opts); 1452 } 1453 1454 memcpy(cp, &null_opt, sizeof(null_opt)); 1455 cp += sizeof(null_opt); 1456 1457 return (all_opts); 1458 } 1459 1460 static const char * 1461 wday_str(int idx) 1462 { 1463 static const char *weekdays[] = { 1464 "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat" 1465 }; 1466 1467 if (idx >= 0 && idx < 7) 1468 return (weekdays[idx]); 1469 else 1470 return ("UNK"); 1471 } 1472 1473 static const char * 1474 mon_str(int idx) 1475 { 1476 static const char *months[] = { 1477 "Jan", "Feb", "Mar", "Apr", "May", "Jun", 1478 "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" 1479 }; 1480 1481 if (idx >= 0 && idx < 12) 1482 return (months[idx]); 1483 else 1484 return ("UNK"); 1485 } 1486 1487 static int 1488 show_memmap(struct vmctx *ctx) 1489 { 1490 char name[SPECNAMELEN + 1], numbuf[8]; 1491 vm_ooffset_t segoff; 1492 vm_paddr_t gpa; 1493 size_t maplen, seglen; 1494 int error, flags, prot, segid, delim; 1495 1496 printf("Address Length Segment Offset "); 1497 printf("Prot Flags\n"); 1498 1499 gpa = 0; 1500 while (1) { 1501 error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen, 1502 &prot, &flags); 1503 if (error) 1504 return (errno == ENOENT ? 0 : error); 1505 1506 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1507 if (error) 1508 return (error); 1509 1510 printf("%-12lX", gpa); 1511 humanize_number(numbuf, sizeof(numbuf), maplen, "B", 1512 HN_AUTOSCALE, HN_NOSPACE); 1513 printf("%-12s", numbuf); 1514 1515 printf("%-12s", name[0] ? name : "sysmem"); 1516 printf("%-12lX", segoff); 1517 printf("%c%c%c ", prot & PROT_READ ? 'R' : '-', 1518 prot & PROT_WRITE ? 'W' : '-', 1519 prot & PROT_EXEC ? 'X' : '-'); 1520 1521 delim = '\0'; 1522 if (flags & VM_MEMMAP_F_WIRED) { 1523 printf("%cwired", delim); 1524 delim = '/'; 1525 } 1526 if (flags & VM_MEMMAP_F_IOMMU) { 1527 printf("%ciommu", delim); 1528 delim = '/'; 1529 } 1530 printf("\n"); 1531 1532 gpa += maplen; 1533 } 1534 } 1535 1536 static int 1537 show_memseg(struct vmctx *ctx) 1538 { 1539 char name[SPECNAMELEN + 1], numbuf[8]; 1540 size_t seglen; 1541 int error, segid; 1542 1543 printf("ID Length Name\n"); 1544 1545 segid = 0; 1546 while (1) { 1547 error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name)); 1548 if (error) 1549 return (errno == EINVAL ? 0 : error); 1550 1551 if (seglen) { 1552 printf("%-4d", segid); 1553 humanize_number(numbuf, sizeof(numbuf), seglen, "B", 1554 HN_AUTOSCALE, HN_NOSPACE); 1555 printf("%-12s", numbuf); 1556 printf("%s", name[0] ? name : "sysmem"); 1557 printf("\n"); 1558 } 1559 segid++; 1560 } 1561 } 1562 1563 static int 1564 show_fpu(struct vmctx *ctx, int vcpu) 1565 { 1566 int res, fd; 1567 1568 struct vm_fpu_desc_entry entries[64]; 1569 struct vm_fpu_desc desc = { 1570 .vfd_entry_data = entries, 1571 .vfd_num_entries = 64, 1572 }; 1573 fd = vm_get_device_fd(ctx); 1574 res = ioctl(fd, VM_DESC_FPU_AREA, &desc); 1575 if (res != 0) { 1576 return (errno); 1577 } 1578 for (uint_t i = 0; i < desc.vfd_num_entries; i++) { 1579 const struct vm_fpu_desc_entry *entry = &entries[i]; 1580 1581 /* confirm that AVX fields are where we expect */ 1582 if (entry->vfde_feature == XFEATURE_AVX) { 1583 if (entry->vfde_size != 0x100 || 1584 entry->vfde_off != 0x240) { 1585 (void) fprintf(stderr, 1586 "show_fpu: unexpected AVX size/placement " 1587 "- size:%x off:%x\n", 1588 entry->vfde_size, entry->vfde_off); 1589 return (EINVAL); 1590 } 1591 } 1592 } 1593 void *buf = malloc(desc.vfd_req_size); 1594 if (buf == NULL) { 1595 return (ENOMEM); 1596 } 1597 struct vm_fpu_state req = { 1598 .vcpuid = vcpu, 1599 .buf = buf, 1600 .len = desc.vfd_req_size, 1601 }; 1602 res = ioctl(fd, VM_GET_FPU, &req); 1603 if (res != 0) { 1604 res = errno; 1605 free(buf); 1606 return (res); 1607 } 1608 1609 const struct xsave_state *state = buf; 1610 const struct fxsave_state *fx = &state->xs_fxsave; 1611 (void) printf("fpu_fcw[%d]\t\t0x%04x\n", vcpu, fx->fx_fcw); 1612 (void) printf("fpu_fsw[%d]\t\t0x%04x\n", vcpu, fx->fx_fsw); 1613 (void) printf("fpu_ftw[%d]\t\t0x%04x\n", vcpu, fx->fx_fctw); 1614 (void) printf("fpu_fop[%d]\t\t0x%04x\n", vcpu, fx->fx_fop); 1615 (void) printf("fpu_rip[%d]\t\t0x%016lx\n", vcpu, fx->fx_rip); 1616 (void) printf("fpu_rdp[%d]\t\t0x%016lx\n", vcpu, fx->fx_rdp); 1617 (void) printf("fpu_mxcsr[%d]\t\t0x%08x\n", vcpu, fx->fx_mxcsr); 1618 (void) printf("fpu_mxcsr_mask[%d]\t0x%08x\n", vcpu, 1619 fx->fx_mxcsr_mask); 1620 /* ST/MMX regs */ 1621 for (uint_t i = 0; i < 8; i++) { 1622 (void) printf("fpu_st%u[%d]\t\t0x%08x%08x%08x%08x\n", vcpu, i, 1623 fx->fx_st[i].__fpr_pad[0], fx->fx_st[i].__fpr_pad[1], 1624 fx->fx_st[i].__fpr_pad[2], fx->fx_st[i].__fpr_pad[3]); 1625 } 1626 /* SSE regs */ 1627 for (uint_t i = 0; i < 16; i++) { 1628 (void) printf("fpu_xmm%u[%d]\t\t0x%08x%08x%08x%08x\n", 1629 i, vcpu, 1630 fx->fx_xmm[i]._l[0], fx->fx_xmm[i]._l[1], 1631 fx->fx_xmm[i]._l[2], fx->fx_xmm[i]._l[3]); 1632 } 1633 1634 if (state->xs_header.xsh_xstate_bv & XFEATURE_AVX) { 1635 /* AVX regs */ 1636 for (uint_t i = 0; i < 16; i++) { 1637 (void) printf("fpu_ymm%u[%d]\t\t0x%08x%08x%08x%08x\n", 1638 i, vcpu, 1639 state->xs_ymm[i]._l[0], state->xs_ymm[i]._l[1], 1640 state->xs_ymm[i]._l[2], state->xs_ymm[i]._l[3]); 1641 } 1642 } 1643 1644 free(buf); 1645 return (0); 1646 } 1647 1648 static const char * 1649 msr_name(uint32_t msr) 1650 { 1651 #define MSR_IDENT_MAP(x) case x: return (#x); 1652 switch (msr) { 1653 MSR_IDENT_MAP(MSR_PAT) 1654 MSR_IDENT_MAP(MSR_SYSENTER_CS_MSR) 1655 MSR_IDENT_MAP(MSR_SYSENTER_ESP_MSR) 1656 MSR_IDENT_MAP(MSR_SYSENTER_EIP_MSR) 1657 MSR_IDENT_MAP(MSR_STAR) 1658 MSR_IDENT_MAP(MSR_LSTAR) 1659 MSR_IDENT_MAP(MSR_CSTAR) 1660 MSR_IDENT_MAP(MSR_SF_MASK) 1661 MSR_IDENT_MAP(MSR_FSBASE) 1662 MSR_IDENT_MAP(MSR_GSBASE) 1663 MSR_IDENT_MAP(MSR_KGSBASE) 1664 MSR_IDENT_MAP(MSR_EFER) 1665 MSR_IDENT_MAP(MSR_MTRRcap) 1666 MSR_IDENT_MAP(MSR_MTRRdefType) 1667 case MSR_TSC: 1668 return ("MSR_TSC (offset from system boot)"); 1669 default: 1670 return (NULL); 1671 } 1672 } 1673 1674 static int 1675 show_msrs(struct vmctx *ctx, int vcpu) 1676 { 1677 struct vdi_field_entry_v1 *msrs; 1678 struct vm_data_xfer xfer = { 1679 .vdx_vcpuid = vcpu, 1680 .vdx_class = VDC_MSR, 1681 .vdx_version = 1, 1682 .vdx_len = 0, 1683 .vdx_data = &msrs, 1684 }; 1685 int fd = vm_get_device_fd(ctx); 1686 int res; 1687 1688 /* Figure out how many entries we need to alloc for */ 1689 res = ioctl(fd, VM_DATA_READ, &xfer); 1690 if (res == 0) { 1691 return (EINVAL); 1692 } else if (errno != ENOSPC) { 1693 return (errno); 1694 } 1695 const uint32_t len = xfer.vdx_result_len; 1696 msrs = malloc(len); 1697 if (msrs == NULL) { 1698 return (ENOMEM); 1699 } 1700 bzero(msrs, len); 1701 xfer.vdx_data = msrs; 1702 xfer.vdx_len = len; 1703 1704 /* Query the actual data, now that we should have an adequate buffer */ 1705 res = ioctl(fd, VM_DATA_READ, &xfer); 1706 if (res != 0) { 1707 free(msrs); 1708 return (errno); 1709 } 1710 1711 const uint_t count = 1712 xfer.vdx_result_len / sizeof (struct vdi_field_entry_v1); 1713 for (uint_t i = 0; i < count; i++) { 1714 const uint32_t ident = msrs[i].vfe_ident; 1715 const uint64_t value = msrs[i].vfe_value; 1716 1717 const char *name = msr_name(ident); 1718 1719 if (name != NULL) { 1720 printf("msr[%s]\t = %x\n", name, value); 1721 } else { 1722 printf("msr[%08x]\t = %x\n", ident, value); 1723 } 1724 } 1725 free(msrs); 1726 return (0); 1727 } 1728 1729 int 1730 main(int argc, char *argv[]) 1731 { 1732 char *vmname; 1733 int error, ch, vcpu, ptenum; 1734 vm_paddr_t gpa_pmap; 1735 struct vm_exit vmexit; 1736 uint64_t rax, cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7; 1737 uint64_t rsp, rip, rflags, efer; 1738 uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2]; 1739 struct vmctx *ctx; 1740 cpuset_t cpus; 1741 bool cpu_intel; 1742 uint64_t cs, ds, es, fs, gs, ss, tr, ldtr; 1743 struct tm tm; 1744 struct option *opts; 1745 1746 cpu_intel = cpu_vendor_intel(); 1747 opts = setup_options(cpu_intel); 1748 1749 vcpu = 0; 1750 vmname = NULL; 1751 assert_lapic_lvt = -1; 1752 progname = basename(argv[0]); 1753 1754 while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) { 1755 switch (ch) { 1756 case 0: 1757 break; 1758 case VMNAME: 1759 vmname = optarg; 1760 break; 1761 case VCPU: 1762 vcpu = atoi(optarg); 1763 break; 1764 case SET_MEM: 1765 memsize = atoi(optarg) * MB; 1766 memsize = roundup(memsize, 2 * MB); 1767 break; 1768 case SET_EFER: 1769 efer = strtoul(optarg, NULL, 0); 1770 set_efer = 1; 1771 break; 1772 case SET_CR0: 1773 cr0 = strtoul(optarg, NULL, 0); 1774 set_cr0 = 1; 1775 break; 1776 case SET_CR2: 1777 cr2 = strtoul(optarg, NULL, 0); 1778 set_cr2 = 1; 1779 break; 1780 case SET_CR3: 1781 cr3 = strtoul(optarg, NULL, 0); 1782 set_cr3 = 1; 1783 break; 1784 case SET_CR4: 1785 cr4 = strtoul(optarg, NULL, 0); 1786 set_cr4 = 1; 1787 break; 1788 case SET_DR0: 1789 dr0 = strtoul(optarg, NULL, 0); 1790 set_dr0 = 1; 1791 break; 1792 case SET_DR1: 1793 dr1 = strtoul(optarg, NULL, 0); 1794 set_dr1 = 1; 1795 break; 1796 case SET_DR2: 1797 dr2 = strtoul(optarg, NULL, 0); 1798 set_dr2 = 1; 1799 break; 1800 case SET_DR3: 1801 dr3 = strtoul(optarg, NULL, 0); 1802 set_dr3 = 1; 1803 break; 1804 case SET_DR6: 1805 dr6 = strtoul(optarg, NULL, 0); 1806 set_dr6 = 1; 1807 break; 1808 case SET_DR7: 1809 dr7 = strtoul(optarg, NULL, 0); 1810 set_dr7 = 1; 1811 break; 1812 case SET_RSP: 1813 rsp = strtoul(optarg, NULL, 0); 1814 set_rsp = 1; 1815 break; 1816 case SET_RIP: 1817 rip = strtoul(optarg, NULL, 0); 1818 set_rip = 1; 1819 break; 1820 case SET_RAX: 1821 rax = strtoul(optarg, NULL, 0); 1822 set_rax = 1; 1823 break; 1824 case SET_RFLAGS: 1825 rflags = strtoul(optarg, NULL, 0); 1826 set_rflags = 1; 1827 break; 1828 case DESC_BASE: 1829 desc_base = strtoul(optarg, NULL, 0); 1830 break; 1831 case DESC_LIMIT: 1832 desc_limit = strtoul(optarg, NULL, 0); 1833 break; 1834 case DESC_ACCESS: 1835 desc_access = strtoul(optarg, NULL, 0); 1836 break; 1837 case SET_CS: 1838 cs = strtoul(optarg, NULL, 0); 1839 set_cs = 1; 1840 break; 1841 case SET_DS: 1842 ds = strtoul(optarg, NULL, 0); 1843 set_ds = 1; 1844 break; 1845 case SET_ES: 1846 es = strtoul(optarg, NULL, 0); 1847 set_es = 1; 1848 break; 1849 case SET_FS: 1850 fs = strtoul(optarg, NULL, 0); 1851 set_fs = 1; 1852 break; 1853 case SET_GS: 1854 gs = strtoul(optarg, NULL, 0); 1855 set_gs = 1; 1856 break; 1857 case SET_SS: 1858 ss = strtoul(optarg, NULL, 0); 1859 set_ss = 1; 1860 break; 1861 case SET_TR: 1862 tr = strtoul(optarg, NULL, 0); 1863 set_tr = 1; 1864 break; 1865 case SET_LDTR: 1866 ldtr = strtoul(optarg, NULL, 0); 1867 set_ldtr = 1; 1868 break; 1869 case SET_X2APIC_STATE: 1870 x2apic_state = strtol(optarg, NULL, 0); 1871 set_x2apic_state = 1; 1872 break; 1873 case SET_EXCEPTION_BITMAP: 1874 exception_bitmap = strtoul(optarg, NULL, 0); 1875 set_exception_bitmap = 1; 1876 break; 1877 case SET_VMCS_ENTRY_INTERRUPTION_INFO: 1878 vmcs_entry_interruption_info = strtoul(optarg, NULL, 0); 1879 set_vmcs_entry_interruption_info = 1; 1880 break; 1881 case SET_CAP: 1882 capval = strtoul(optarg, NULL, 0); 1883 setcap = 1; 1884 break; 1885 case SET_RTC_TIME: 1886 rtc_secs = strtoul(optarg, NULL, 0); 1887 set_rtc_time = 1; 1888 break; 1889 case SET_RTC_NVRAM: 1890 rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0); 1891 set_rtc_nvram = 1; 1892 break; 1893 case RTC_NVRAM_OFFSET: 1894 rtc_nvram_offset = strtoul(optarg, NULL, 0); 1895 break; 1896 case GET_GPA_PMAP: 1897 gpa_pmap = strtoul(optarg, NULL, 0); 1898 get_gpa_pmap = 1; 1899 break; 1900 case CAPNAME: 1901 capname = optarg; 1902 break; 1903 case ASSERT_LAPIC_LVT: 1904 assert_lapic_lvt = atoi(optarg); 1905 break; 1906 case PMTMR_PORT: 1907 pmtmr_port = strtoul(optarg, NULL, 16); 1908 break; 1909 default: 1910 usage(cpu_intel); 1911 } 1912 } 1913 argc -= optind; 1914 argv += optind; 1915 1916 if (vmname == NULL) 1917 usage(cpu_intel); 1918 1919 error = 0; 1920 1921 if (!error && create) 1922 error = vm_create(vmname, 0); 1923 1924 if (!error) { 1925 ctx = vm_open(vmname); 1926 if (ctx == NULL) { 1927 fprintf(stderr, 1928 "vm_open: %s could not be opened: %s\n", 1929 vmname, strerror(errno)); 1930 exit (1); 1931 } 1932 } 1933 1934 if (!error && pmtmr_port) { 1935 error = vm_pmtmr_set_location(ctx, pmtmr_port); 1936 exit(error); 1937 } 1938 1939 if (!error && wrlock_cycle) { 1940 error = vm_wrlock_cycle(ctx); 1941 exit(error); 1942 } 1943 1944 if (!error && memsize) 1945 error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL); 1946 1947 if (!error && set_efer) 1948 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_EFER, efer); 1949 1950 if (!error && set_cr0) 1951 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR0, cr0); 1952 1953 if (!error && set_cr2) 1954 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR2, cr2); 1955 1956 if (!error && set_cr3) 1957 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR3, cr3); 1958 1959 if (!error && set_cr4) 1960 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR4, cr4); 1961 1962 if (!error && set_dr0) 1963 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR0, dr0); 1964 1965 if (!error && set_dr1) 1966 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR1, dr1); 1967 1968 if (!error && set_dr2) 1969 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR2, dr2); 1970 1971 if (!error && set_dr3) 1972 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR3, dr3); 1973 1974 if (!error && set_dr6) 1975 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR6, dr6); 1976 1977 if (!error && set_dr7) 1978 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR7, dr7); 1979 1980 if (!error && set_rsp) 1981 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RSP, rsp); 1982 1983 if (!error && set_rip) 1984 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, rip); 1985 1986 if (!error && set_rax) 1987 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, rax); 1988 1989 if (!error && set_rflags) { 1990 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RFLAGS, 1991 rflags); 1992 } 1993 1994 if (!error && set_desc_ds) { 1995 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_DS, 1996 desc_base, desc_limit, desc_access); 1997 } 1998 1999 if (!error && set_desc_es) { 2000 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_ES, 2001 desc_base, desc_limit, desc_access); 2002 } 2003 2004 if (!error && set_desc_ss) { 2005 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_SS, 2006 desc_base, desc_limit, desc_access); 2007 } 2008 2009 if (!error && set_desc_cs) { 2010 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_CS, 2011 desc_base, desc_limit, desc_access); 2012 } 2013 2014 if (!error && set_desc_fs) { 2015 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_FS, 2016 desc_base, desc_limit, desc_access); 2017 } 2018 2019 if (!error && set_desc_gs) { 2020 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GS, 2021 desc_base, desc_limit, desc_access); 2022 } 2023 2024 if (!error && set_desc_tr) { 2025 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_TR, 2026 desc_base, desc_limit, desc_access); 2027 } 2028 2029 if (!error && set_desc_ldtr) { 2030 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_LDTR, 2031 desc_base, desc_limit, desc_access); 2032 } 2033 2034 if (!error && set_desc_gdtr) { 2035 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GDTR, 2036 desc_base, desc_limit, 0); 2037 } 2038 2039 if (!error && set_desc_idtr) { 2040 error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_IDTR, 2041 desc_base, desc_limit, 0); 2042 } 2043 2044 if (!error && set_cs) 2045 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CS, cs); 2046 2047 if (!error && set_ds) 2048 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DS, ds); 2049 2050 if (!error && set_es) 2051 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_ES, es); 2052 2053 if (!error && set_fs) 2054 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_FS, fs); 2055 2056 if (!error && set_gs) 2057 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_GS, gs); 2058 2059 if (!error && set_ss) 2060 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_SS, ss); 2061 2062 if (!error && set_tr) 2063 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_TR, tr); 2064 2065 if (!error && set_ldtr) 2066 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_LDTR, ldtr); 2067 2068 if (!error && set_x2apic_state) 2069 error = vm_set_x2apic_state(ctx, vcpu, x2apic_state); 2070 2071 if (!error && set_exception_bitmap) { 2072 if (cpu_intel) 2073 error = vm_set_vmcs_field(ctx, vcpu, 2074 VMCS_EXCEPTION_BITMAP, 2075 exception_bitmap); 2076 else 2077 error = vm_set_vmcb_field(ctx, vcpu, 2078 VMCB_OFF_EXC_INTERCEPT, 2079 4, exception_bitmap); 2080 } 2081 2082 if (!error && cpu_intel && set_vmcs_entry_interruption_info) { 2083 error = vm_set_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO, 2084 vmcs_entry_interruption_info); 2085 } 2086 2087 if (!error && inject_nmi) { 2088 error = vm_inject_nmi(ctx, vcpu); 2089 } 2090 2091 if (!error && assert_lapic_lvt != -1) { 2092 error = vm_lapic_local_irq(ctx, vcpu, assert_lapic_lvt); 2093 } 2094 2095 if (!error && (get_memseg || get_all)) 2096 error = show_memseg(ctx); 2097 2098 if (!error && (get_memmap || get_all)) 2099 error = show_memmap(ctx); 2100 2101 if (!error) 2102 error = get_all_registers(ctx, vcpu); 2103 2104 if (!error) 2105 error = get_all_segments(ctx, vcpu); 2106 2107 if (!error && (get_fpu || get_all)) { 2108 error = show_fpu(ctx, vcpu); 2109 } 2110 2111 if (!error) { 2112 if (cpu_intel) 2113 error = get_misc_vmcs(ctx, vcpu); 2114 else 2115 error = get_misc_vmcb(ctx, vcpu); 2116 } 2117 2118 if (!error && (get_x2apic_state || get_all)) { 2119 error = vm_get_x2apic_state(ctx, vcpu, &x2apic_state); 2120 if (error == 0) 2121 printf("x2apic_state[%d]\t%d\n", vcpu, x2apic_state); 2122 } 2123 2124 if (!error && (get_eptp || get_all)) { 2125 if (cpu_intel) 2126 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EPTP, &eptp); 2127 else 2128 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_NPT_BASE, 2129 8, &eptp); 2130 if (error == 0) 2131 printf("%s[%d]\t\t0x%016lx\n", 2132 cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp); 2133 } 2134 2135 if (!error && (get_exception_bitmap || get_all)) { 2136 if(cpu_intel) 2137 error = vm_get_vmcs_field(ctx, vcpu, 2138 VMCS_EXCEPTION_BITMAP, &bm); 2139 else 2140 error = vm_get_vmcb_field(ctx, vcpu, 2141 VMCB_OFF_EXC_INTERCEPT, 2142 4, &bm); 2143 if (error == 0) 2144 printf("exception_bitmap[%d]\t%#lx\n", vcpu, bm); 2145 } 2146 2147 if (!error && (get_io_bitmap || get_all)) { 2148 if (cpu_intel) { 2149 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_A, 2150 &bm); 2151 if (error == 0) 2152 printf("io_bitmap_a[%d]\t%#lx\n", vcpu, bm); 2153 error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_B, 2154 &bm); 2155 if (error == 0) 2156 printf("io_bitmap_b[%d]\t%#lx\n", vcpu, bm); 2157 } else { 2158 error = vm_get_vmcb_field(ctx, vcpu, 2159 VMCB_OFF_IO_PERM, 8, &bm); 2160 if (error == 0) 2161 printf("io_bitmap[%d]\t%#lx\n", vcpu, bm); 2162 } 2163 } 2164 2165 if (!error && (get_tsc_offset || get_all)) { 2166 uint64_t tscoff; 2167 if (cpu_intel) 2168 error = vm_get_vmcs_field(ctx, vcpu, VMCS_TSC_OFFSET, 2169 &tscoff); 2170 else 2171 error = vm_get_vmcb_field(ctx, vcpu, 2172 VMCB_OFF_TSC_OFFSET, 2173 8, &tscoff); 2174 if (error == 0) 2175 printf("tsc_offset[%d]\t0x%016lx\n", vcpu, tscoff); 2176 } 2177 2178 if (!error && (get_msr_bitmap_address || get_all)) { 2179 if (cpu_intel) 2180 error = vm_get_vmcs_field(ctx, vcpu, VMCS_MSR_BITMAP, 2181 &addr); 2182 else 2183 error = vm_get_vmcb_field(ctx, vcpu, 2184 VMCB_OFF_MSR_PERM, 8, &addr); 2185 if (error == 0) 2186 printf("msr_bitmap[%d]\t\t%#lx\n", vcpu, addr); 2187 } 2188 2189 if (!error && (get_vpid_asid || get_all)) { 2190 uint64_t vpid; 2191 if (cpu_intel) 2192 error = vm_get_vmcs_field(ctx, vcpu, VMCS_VPID, &vpid); 2193 else 2194 error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_ASID, 2195 4, &vpid); 2196 if (error == 0) 2197 printf("%s[%d]\t\t0x%04lx\n", 2198 cpu_intel ? "vpid" : "asid", vcpu, vpid); 2199 } 2200 2201 if (!error && (get_guest_msrs || get_all)) { 2202 error = show_msrs(ctx, vcpu); 2203 } 2204 2205 if (!error && (get_exit_reason || get_all)) { 2206 if (cpu_intel) 2207 error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_REASON, 2208 &u64); 2209 else 2210 error = vm_get_vmcb_field(ctx, vcpu, 2211 VMCB_OFF_EXIT_REASON, 8, 2212 &u64); 2213 if (error == 0) 2214 printf("exit_reason[%d]\t%#lx\n", vcpu, u64); 2215 } 2216 2217 if (!error && setcap) { 2218 int captype; 2219 captype = vm_capability_name2type(capname); 2220 error = vm_set_capability(ctx, vcpu, captype, capval); 2221 if (error != 0 && errno == ENOENT) 2222 printf("Capability \"%s\" is not available\n", capname); 2223 } 2224 2225 if (!error && get_gpa_pmap) { 2226 error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum); 2227 if (error == 0) { 2228 printf("gpa %#lx:", gpa_pmap); 2229 pte = &pteval[0]; 2230 while (ptenum-- > 0) 2231 printf(" %#lx", *pte++); 2232 printf("\n"); 2233 } 2234 } 2235 2236 if (!error && set_rtc_nvram) 2237 error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value); 2238 2239 if (!error && (get_rtc_nvram || get_all)) { 2240 error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value); 2241 if (error == 0) { 2242 printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset, 2243 rtc_nvram_value); 2244 } 2245 } 2246 2247 if (!error && set_rtc_time) { 2248 timespec_t ts = { 2249 .tv_sec = rtc_secs, 2250 .tv_nsec = 0, 2251 }; 2252 2253 error = vm_rtc_settime(ctx, &ts); 2254 } 2255 2256 if (!error && (get_rtc_time || get_all)) { 2257 timespec_t ts; 2258 2259 error = vm_rtc_gettime(ctx, &ts); 2260 if (error == 0) { 2261 gmtime_r(&ts.tv_sec, &tm); 2262 printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n", 2263 ts.tv_sec, wday_str(tm.tm_wday), mon_str(tm.tm_mon), 2264 tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec, 2265 1900 + tm.tm_year); 2266 } 2267 } 2268 2269 if (!error && (getcap || get_all)) { 2270 int captype, val, getcaptype; 2271 2272 if (getcap && capname) 2273 getcaptype = vm_capability_name2type(capname); 2274 else 2275 getcaptype = -1; 2276 2277 for (captype = 0; captype < VM_CAP_MAX; captype++) { 2278 if (getcaptype >= 0 && captype != getcaptype) 2279 continue; 2280 error = vm_get_capability(ctx, vcpu, captype, &val); 2281 if (error == 0) { 2282 printf("Capability \"%s\" is %s on vcpu %d\n", 2283 vm_capability_type2name(captype), 2284 val ? "set" : "not set", vcpu); 2285 } else if (errno == ENOENT) { 2286 error = 0; 2287 printf("Capability \"%s\" is not available\n", 2288 vm_capability_type2name(captype)); 2289 } else { 2290 break; 2291 } 2292 } 2293 } 2294 2295 if (!error && (get_active_cpus || get_all)) { 2296 error = vm_active_cpus(ctx, &cpus); 2297 if (!error) 2298 print_cpus("active cpus", &cpus); 2299 } 2300 2301 if (!error && (get_suspended_cpus || get_all)) { 2302 error = vm_suspended_cpus(ctx, &cpus); 2303 if (!error) 2304 print_cpus("suspended cpus", &cpus); 2305 } 2306 2307 if (!error && (get_intinfo || get_all)) { 2308 error = vm_get_intinfo(ctx, vcpu, &info[0], &info[1]); 2309 if (!error) { 2310 print_intinfo("pending", info[0]); 2311 print_intinfo("current", info[1]); 2312 } 2313 } 2314 2315 if (!error && (get_stats || get_all)) { 2316 int i, num_stats; 2317 uint64_t *stats; 2318 struct timeval tv; 2319 const char *desc; 2320 2321 stats = vm_get_stats(ctx, vcpu, &tv, &num_stats); 2322 if (stats != NULL) { 2323 printf("vcpu%d stats:\n", vcpu); 2324 for (i = 0; i < num_stats; i++) { 2325 desc = vm_get_stat_desc(ctx, i); 2326 printf("%-40s\t%ld\n", desc, stats[i]); 2327 } 2328 } 2329 } 2330 2331 if (!error && (get_cpu_topology || get_all)) { 2332 uint16_t sockets, cores, threads, maxcpus; 2333 2334 vm_get_topology(ctx, &sockets, &cores, &threads, &maxcpus); 2335 printf("cpu_topology:\tsockets=%hu, cores=%hu, threads=%hu, " 2336 "maxcpus=%hu\n", sockets, cores, threads, maxcpus); 2337 } 2338 2339 if (!error && run) { 2340 struct vm_entry entry; 2341 2342 bzero(&entry, sizeof (entry)); 2343 2344 error = vm_run(ctx, vcpu, &entry, &vmexit); 2345 if (error == 0) 2346 dump_vm_run_exitcode(&vmexit, vcpu); 2347 else 2348 printf("vm_run error %d\n", error); 2349 } 2350 2351 if (!error && do_pause) { 2352 error = ioctl(vm_get_device_fd(ctx), VM_PAUSE, vcpu); 2353 2354 if (error != 0) { 2355 printf("vm_pause error %d\n", errno); 2356 } 2357 } 2358 if (!error && do_resume) { 2359 error = ioctl(vm_get_device_fd(ctx), VM_RESUME, vcpu); 2360 2361 if (error != 0) { 2362 printf("vm_resume error %d\n", errno); 2363 } 2364 } 2365 2366 if (!error && force_reset) 2367 error = vm_suspend(ctx, VM_SUSPEND_RESET); 2368 2369 if (!error && force_poweroff) 2370 error = vm_suspend(ctx, VM_SUSPEND_POWEROFF); 2371 2372 if (error) 2373 printf("errno = %d\n", errno); 2374 2375 if (!error && destroy) 2376 vm_destroy(ctx); 2377 2378 free (opts); 2379 exit(error); 2380 } 2381