Searched refs:KVM_REG_SIZE_MASK (Results 1 – 18 of 18) sorted by relevance
195 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_config()244 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_config()349 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_core()382 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_core()486 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_csr()528 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_csr()672 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_isa_ext()711 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_isa_ext()
261 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_sbi_ext()298 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_sbi_ext()337 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_sbi()366 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_sbi()
85 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_fp()130 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_fp()
145 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_vector()171 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_vector()
166 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_get_reg_timer()206 KVM_REG_SIZE_MASK | in kvm_riscv_vcpu_set_reg_timer()
743 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { in kvm_mips_get_reg()747 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { in kvm_mips_get_reg()752 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { in kvm_mips_get_reg()770 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) { in kvm_mips_set_reg()775 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) { in kvm_mips_set_reg()782 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { in kvm_mips_set_reg()
100 #define REG_MASK (KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_COPROC_MASK)191 switch (id & KVM_REG_SIZE_MASK) { in print_reg()221 prefix, (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id); in print_reg()
35 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
204 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
73 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE); in core_reg_offset_from_id()768 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32) in kvm_arm_get_reg()788 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32) in kvm_arm_set_reg()
3620 switch (id & KVM_REG_SIZE_MASK) { in index_to_params()3623 if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK in index_to_params()3752 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_get()3777 if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK in demux_c15_set()
47 (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
13 #define REG_MASK (KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK)598 switch (id & KVM_REG_SIZE_MASK) { in print_reg()610 (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id & ~REG_MASK); in print_reg()
529 u64 v, size = reg->id & KVM_REG_SIZE_MASK; in kvm_get_reg()595 u64 v, size = reg->id & KVM_REG_SIZE_MASK; in kvm_set_reg()
1056 #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL macro
406 (1ul << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))