xref: /illumos-gate/usr/src/uts/common/io/hxge/hxge_impl.h (revision 0dc2366f7b9f9f36e10909b1e95edbf2a261c2ac)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_HXGE_HXGE_IMPL_H
27 #define	_SYS_HXGE_HXGE_IMPL_H
28 
29 #ifdef	__cplusplus
30 extern "C" {
31 #endif
32 
33 #ifndef _ASM
34 #include <sys/types.h>
35 #include <sys/byteorder.h>
36 #include <sys/debug.h>
37 #include <sys/stropts.h>
38 #include <sys/stream.h>
39 #include <sys/strlog.h>
40 #include <sys/strsubr.h>
41 #include <sys/cmn_err.h>
42 #include <sys/vtrace.h>
43 #include <sys/kmem.h>
44 #include <sys/ddi.h>
45 #include <sys/sunddi.h>
46 #include <sys/strsun.h>
47 #include <sys/stat.h>
48 #include <sys/cpu.h>
49 #include <sys/kstat.h>
50 #include <inet/common.h>
51 #include <inet/ip.h>
52 #include <inet/ip6.h>
53 #include <sys/dlpi.h>
54 #include <inet/nd.h>
55 #include <netinet/in.h>
56 #include <sys/ethernet.h>
57 #include <sys/vlan.h>
58 #include <sys/pci.h>
59 #include <sys/taskq.h>
60 #include <sys/atomic.h>
61 
62 #include <hxge_defs.h>
63 #include <hxge_peu.h>
64 #include <hxge_pfc.h>
65 #include <hxge_pfc_hw.h>
66 #include <hxge_vmac.h>
67 #include <hxge_fm.h>
68 #include <sys/netlb.h>
69 #include <sys/ddi_intr.h>
70 
71 #include <sys/mac_provider.h>
72 #include <sys/mac_ether.h>
73 #include <sys/note.h>
74 
75 /*
76  * Handy macros (taken from bge driver)
77  */
78 #define	RBR_SIZE			4
79 #define	DMA_COMMON_VPTR(area)		((area.kaddrp))
80 #define	DMA_COMMON_HANDLE(area)		((area.dma_handle))
81 #define	DMA_COMMON_ACC_HANDLE(area)	((area.acc_handle))
82 #define	DMA_COMMON_IOADDR(area)		((area.dma_cookie.dmac_laddress))
83 #define	DMA_COMMON_SYNC(area, flag)	((void) ddi_dma_sync((area).dma_handle,\
84 						(area).offset, (area).alength, \
85 						(flag)))
86 #define	DMA_COMMON_SYNC_OFFSET(area, bufoffset, len, flag)	\
87 					((void) ddi_dma_sync((area).dma_handle,\
88 					(area.offset + bufoffset), len, \
89 					(flag)))
90 
91 #define	NEXT_ENTRY(index, wrap)		((index + 1) & wrap)
92 #define	NEXT_ENTRY_PTR(ptr, first, last)	\
93 					((ptr == last) ? first : (ptr + 1))
94 
95 /*
96  * HPI related macros
97  */
98 #define	HXGE_DEV_HPI_HANDLE(hxgep)	(hxgep->hpi_handle)
99 
100 #define	HPI_PCI_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_pci_handle.regh = ah)
101 #define	HPI_PCI_ADD_HANDLE_SET(hxgep, ap) (hxgep->hpi_pci_handle.regp = ap)
102 
103 #define	HPI_ACC_HANDLE_SET(hxgep, ah)	(hxgep->hpi_handle.regh = ah)
104 #define	HPI_ADD_HANDLE_SET(hxgep, ap)	\
105 		hxgep->hpi_handle.is_vraddr = B_FALSE;	\
106 		hxgep->hpi_handle.function.instance = hxgep->instance;   \
107 		hxgep->hpi_handle.function.function = 0;   \
108 		hxgep->hpi_handle.hxgep = (void *) hxgep;   \
109 		hxgep->hpi_handle.regp = ap;
110 
111 #define	HPI_REG_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_reg_handle.regh = ah)
112 #define	HPI_REG_ADD_HANDLE_SET(hxgep, ap)	\
113 		hxgep->hpi_reg_handle.is_vraddr = B_FALSE;	\
114 		hxgep->hpi_handle.function.instance = hxgep->instance;   \
115 		hxgep->hpi_handle.function.function = 0;   \
116 		hxgep->hpi_reg_handle.hxgep = (void *) hxgep;   \
117 		hxgep->hpi_reg_handle.regp = ap;
118 
119 #define	HPI_MSI_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_msi_handle.regh = ah)
120 #define	HPI_MSI_ADD_HANDLE_SET(hxgep, ap)	\
121 		hxgep->hpi_msi_handle.is_vraddr = B_FALSE;	\
122 		hxgep->hpi_msi_handle.function.instance = hxgep->instance;   \
123 		hxgep->hpi_msi_handle.function.function = 0;   \
124 		hxgep->hpi_msi_handle.hxgep = (void *) hxgep;   \
125 		hxgep->hpi_msi_handle.regp = ap;
126 
127 #define	HPI_DMA_ACC_HANDLE_SET(dmap, ah) (dmap->hpi_handle.regh = ah)
128 #define	HPI_DMA_ACC_HANDLE_GET(dmap) 	(dmap->hpi_handle.regh)
129 
130 #define	LDV_ON(ldv, vector)	((vector >> ldv) & 0x1)
131 
132 typedef uint32_t		hxge_status_t;
133 
134 typedef enum  {
135 	DVMA,
136 	DMA,
137 	SDMA
138 } dma_method_t;
139 
140 typedef enum  {
141 	BKSIZE_4K,
142 	BKSIZE_8K,
143 	BKSIZE_16K,
144 	BKSIZE_32K
145 } hxge_rx_block_size_t;
146 
147 #ifdef TX_ONE_BUF
148 #define	TX_BCOPY_MAX 512
149 #else
150 #define	TX_BCOPY_MAX	512
151 #define	TX_BCOPY_SIZE	512
152 #endif
153 
154 #define	TX_STREAM_MIN 512
155 #define	TX_FASTDVMA_MIN 1024
156 
157 #define	HXGE_RDC_RCR_THRESHOLD_MAX	256
158 #define	HXGE_RDC_RCR_TIMEOUT_MAX	64
159 #define	HXGE_RDC_RCR_THRESHOLD_MIN	1
160 #define	HXGE_RDC_RCR_TIMEOUT_MIN	1
161 
162 #define	HXGE_IS_VLAN_PACKET(ptr)				\
163 	((((struct ether_vlan_header *)ptr)->ether_tpid) ==	\
164 	htons(VLAN_ETHERTYPE))
165 
166 typedef enum {
167 	USE_NONE,
168 	USE_BCOPY,
169 	USE_DVMA,
170 	USE_DMA,
171 	USE_SDMA
172 } dma_type_t;
173 
174 struct _hxge_block_mv_t {
175 	uint32_t msg_type;
176 	dma_type_t dma_type;
177 };
178 
179 typedef struct _hxge_block_mv_t hxge_block_mv_t, *p_hxge_block_mv_t;
180 
181 typedef struct ether_addr ether_addr_st, *p_ether_addr_t;
182 typedef struct ether_header ether_header_t, *p_ether_header_t;
183 typedef queue_t *p_queue_t;
184 typedef mblk_t *p_mblk_t;
185 
186 /*
187  * Common DMA data elements.
188  */
189 struct _hxge_dma_common_t {
190 	uint16_t		dma_channel;
191 	void			*kaddrp;
192 	void			*ioaddr_pp;
193 	ddi_dma_cookie_t 	dma_cookie;
194 	uint32_t		ncookies;
195 
196 	ddi_dma_handle_t	dma_handle;
197 	hxge_os_acc_handle_t	acc_handle;
198 	hpi_handle_t		hpi_handle;
199 
200 	size_t			block_size;
201 	uint32_t		nblocks;
202 	size_t			alength;
203 	uint_t			offset;
204 	uint_t			dma_chunk_index;
205 	void			*orig_ioaddr_pp;
206 	uint64_t		orig_vatopa;
207 	void			*orig_kaddrp;
208 	size_t			orig_alength;
209 	boolean_t		contig_alloc_type;
210 };
211 
212 typedef struct _hxge_t hxge_t, *p_hxge_t;
213 typedef struct _hxge_dma_common_t hxge_dma_common_t, *p_hxge_dma_common_t;
214 
215 typedef struct _hxge_dma_pool_t {
216 	p_hxge_dma_common_t	*dma_buf_pool_p;
217 	uint32_t		ndmas;
218 	uint32_t		*num_chunks;
219 	boolean_t		buf_allocated;
220 } hxge_dma_pool_t, *p_hxge_dma_pool_t;
221 
222 /*
223  * Each logical device (69):
224  *	- LDG #
225  *	- flag bits
226  *	- masks.
227  *	- interrupt handler function.
228  *
229  * Generic system interrupt handler with two arguments:
230  *	(hxge_sys_intr_t)
231  *	Per device instance data structure
232  *	Logical group data structure.
233  *
234  * Logical device interrupt handler with two arguments:
235  *	(hxge_ldv_intr_t)
236  *	Per device instance data structure
237  *	Logical device number
238  */
239 typedef struct	_hxge_ldg_t hxge_ldg_t, *p_hxge_ldg_t;
240 typedef struct	_hxge_ldv_t hxge_ldv_t, *p_hxge_ldv_t;
241 typedef uint_t	(*hxge_sys_intr_t)(caddr_t arg1, caddr_t arg2);
242 typedef uint_t	(*hxge_ldv_intr_t)(caddr_t arg1, caddr_t arg2);
243 
244 /*
245  * Each logical device Group (64) needs to have the following
246  * configurations:
247  *	- timer counter (6 bits)
248  *	- timer resolution (20 bits, number of system clocks)
249  *	- system data (7 bits)
250  */
251 struct _hxge_ldg_t {
252 	uint8_t			ldg;		/* logical group number */
253 	uint8_t			vldg_index;
254 	boolean_t		arm;
255 	boolean_t		interrupted;
256 	uint16_t		ldg_timer;	/* counter */
257 	uint8_t			vector;
258 	uint8_t			nldvs;
259 	p_hxge_ldv_t		ldvp;
260 	hxge_sys_intr_t		sys_intr_handler;
261 	p_hxge_t		hxgep;
262 	uint32_t		htable_idx;
263 };
264 
265 struct _hxge_ldv_t {
266 	uint8_t			ldg_assigned;
267 	uint8_t			ldv;
268 	boolean_t		is_rxdma;
269 	boolean_t		is_txdma;
270 	boolean_t		is_vmac;
271 	boolean_t		is_syserr;
272 	boolean_t		is_pfc;
273 	boolean_t		use_timer;
274 	uint8_t			channel;
275 	uint8_t			vdma_index;
276 	p_hxge_ldg_t		ldgp;
277 	uint8_t			ldv_ldf_masks;
278 	hxge_ldv_intr_t		ldv_intr_handler;
279 	p_hxge_t		hxgep;
280 };
281 
282 typedef struct _pci_cfg_t {
283 	uint16_t vendorid;
284 	uint16_t devid;
285 	uint16_t command;
286 	uint16_t status;
287 	uint8_t  revid;
288 	uint8_t  res0;
289 	uint16_t junk1;
290 	uint8_t  cache_line;
291 	uint8_t  latency;
292 	uint8_t  header;
293 	uint8_t  bist;
294 	uint32_t base;
295 	uint32_t base14;
296 	uint32_t base18;
297 	uint32_t base1c;
298 	uint32_t base20;
299 	uint32_t base24;
300 	uint32_t base28;
301 	uint32_t base2c;
302 	uint32_t base30;
303 	uint32_t res1[2];
304 	uint8_t int_line;
305 	uint8_t int_pin;
306 	uint8_t	min_gnt;
307 	uint8_t max_lat;
308 } pci_cfg_t, *p_pci_cfg_t;
309 
310 typedef struct _dev_regs_t {
311 	hxge_os_acc_handle_t	hxge_pciregh;	/* PCI config DDI IO handle */
312 	p_pci_cfg_t		hxge_pciregp;	/* mapped PCI registers */
313 
314 	hxge_os_acc_handle_t	hxge_regh;	/* device DDI IO (BAR 0) */
315 	void			*hxge_regp;	/* mapped device registers */
316 
317 	hxge_os_acc_handle_t	hxge_msix_regh;	/* MSI/X DDI handle (BAR 2) */
318 	void 			*hxge_msix_regp; /* MSI/X register */
319 
320 	hxge_os_acc_handle_t	hxge_romh;	/* fcode rom handle */
321 	unsigned char		*hxge_romp;	/* fcode pointer */
322 } dev_regs_t, *p_dev_regs_t;
323 
324 #include <hxge_common_impl.h>
325 #include <hxge_common.h>
326 #include <hxge_rxdma.h>
327 #include <hxge_txdma.h>
328 #include <hxge_fzc.h>
329 #include <hxge_flow.h>
330 #include <hxge_virtual.h>
331 #include <hxge.h>
332 #include <sys/modctl.h>
333 #include <sys/pattr.h>
334 #include <hpi_vir.h>
335 
336 /*
337  * Reconfiguring the network devices requires the net_config privilege
338  * in Solaris 10+.  Prior to this, root privilege is required.  In order
339  * that the driver binary can run on both S10+ and earlier versions, we
340  * make the decisiion as to which to use at runtime.  These declarations
341  * allow for either (or both) to exist ...
342  */
343 extern int secpolicy_net_config(const cred_t *, boolean_t);
344 extern void hxge_fm_report_error(p_hxge_t hxgep,
345 	uint8_t err_chan, hxge_fm_ereport_id_t fm_ereport_id);
346 extern int fm_check_acc_handle(ddi_acc_handle_t);
347 extern int fm_check_dma_handle(ddi_dma_handle_t);
348 
349 #pragma weak    secpolicy_net_config
350 
351 hxge_status_t hxge_classify_init(p_hxge_t hxgep);
352 hxge_status_t hxge_classify_uninit(p_hxge_t hxgep);
353 void hxge_put_tcam(p_hxge_t hxgep, p_mblk_t mp);
354 void hxge_get_tcam(p_hxge_t hxgep, p_mblk_t mp);
355 
356 hxge_status_t hxge_classify_init_hw(p_hxge_t hxgep);
357 hxge_status_t hxge_classify_init_sw(p_hxge_t hxgep);
358 hxge_status_t hxge_classify_exit_sw(p_hxge_t hxgep);
359 hxge_status_t hxge_pfc_ip_class_config_all(p_hxge_t hxgep);
360 hxge_status_t hxge_pfc_ip_class_config(p_hxge_t hxgep, tcam_class_t l3_class,
361 	uint32_t class_config);
362 hxge_status_t hxge_pfc_ip_class_config_get(p_hxge_t hxgep,
363 	tcam_class_t l3_class, uint32_t *class_config);
364 
365 hxge_status_t hxge_pfc_set_hash(p_hxge_t, uint32_t);
366 hxge_status_t hxge_pfc_config_tcam_enable(p_hxge_t);
367 hxge_status_t hxge_pfc_config_tcam_disable(p_hxge_t);
368 hxge_status_t hxge_pfc_ip_class_config(p_hxge_t, tcam_class_t, uint32_t);
369 hxge_status_t hxge_pfc_ip_class_config_get(p_hxge_t, tcam_class_t, uint32_t *);
370 hxge_status_t hxge_pfc_mac_addrs_get(p_hxge_t hxgep);
371 
372 
373 hxge_status_t hxge_pfc_hw_reset(p_hxge_t hxgep);
374 hxge_status_t hxge_pfc_handle_sys_errors(p_hxge_t hxgep);
375 
376 /* hxge_kstats.c */
377 void hxge_init_statsp(p_hxge_t);
378 void hxge_setup_kstats(p_hxge_t);
379 void hxge_destroy_kstats(p_hxge_t);
380 int hxge_port_kstat_update(kstat_t *, int);
381 
382 int hxge_m_stat(void *arg, uint_t stat, uint64_t *val);
383 int hxge_rx_ring_stat(mac_ring_driver_t, uint_t, uint64_t *);
384 int hxge_tx_ring_stat(mac_ring_driver_t, uint_t, uint64_t *);
385 
386 /* hxge_hw.c */
387 void
388 hxge_hw_ioctl(p_hxge_t, queue_t *, mblk_t *, struct iocblk *);
389 void hxge_loopback_ioctl(p_hxge_t, queue_t *, mblk_t *, struct iocblk *);
390 void hxge_global_reset(p_hxge_t);
391 uint_t hxge_intr(caddr_t arg1, caddr_t arg2);
392 void hxge_intr_enable(p_hxge_t hxgep);
393 void hxge_intr_disable(p_hxge_t hxgep);
394 void hxge_hw_id_init(p_hxge_t hxgep);
395 void hxge_hw_init_niu_common(p_hxge_t hxgep);
396 void hxge_intr_hw_enable(p_hxge_t hxgep);
397 void hxge_intr_hw_disable(p_hxge_t hxgep);
398 void hxge_hw_stop(p_hxge_t hxgep);
399 void hxge_global_reset(p_hxge_t hxgep);
400 void hxge_check_hw_state(p_hxge_t hxgep);
401 
402 /* hxge_send.c. */
403 uint_t hxge_reschedule(caddr_t arg);
404 
405 /* hxge_ndd.c */
406 void hxge_get_param_soft_properties(p_hxge_t);
407 void hxge_setup_param(p_hxge_t);
408 void hxge_init_param(p_hxge_t);
409 void hxge_destroy_param(p_hxge_t);
410 boolean_t hxge_check_rxdma_port_member(p_hxge_t, uint8_t);
411 boolean_t hxge_check_txdma_port_member(p_hxge_t, uint8_t);
412 int hxge_param_get_generic(p_hxge_t, queue_t *, mblk_t *, caddr_t);
413 int hxge_param_set_generic(p_hxge_t, queue_t *, mblk_t *, char *, caddr_t);
414 int hxge_get_default(p_hxge_t, queue_t *, p_mblk_t, caddr_t);
415 int hxge_set_default(p_hxge_t, queue_t *, p_mblk_t, char *, caddr_t);
416 int hxge_nd_get_names(p_hxge_t, queue_t *, p_mblk_t, caddr_t);
417 int hxge_mk_mblk_tail_space(p_mblk_t mp, p_mblk_t *nmp, size_t size);
418 void hxge_param_ioctl(p_hxge_t hxgep, queue_t *, mblk_t *, struct iocblk *);
419 boolean_t hxge_nd_load(caddr_t *, char *, pfi_t, pfi_t, caddr_t);
420 void hxge_nd_free(caddr_t *);
421 int hxge_nd_getset(p_hxge_t, queue_t *, caddr_t, p_mblk_t);
422 boolean_t hxge_set_lb(p_hxge_t, queue_t *wq, p_mblk_t mp);
423 int hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *, mblk_t *, char *,
424     caddr_t);
425 int hxge_param_rx_intr_time(p_hxge_t hxgep, queue_t *, mblk_t *, char *,
426     caddr_t);
427 int hxge_param_set_ip_opt(p_hxge_t hxgep, queue_t *, mblk_t *, char *, caddr_t);
428 int hxge_param_get_ip_opt(p_hxge_t hxgep, queue_t *, mblk_t *, caddr_t);
429 
430 /* hxge_virtual.c */
431 hxge_status_t hxge_get_config_properties(p_hxge_t);
432 hxge_status_t hxge_init_fzc_txdma_channel(p_hxge_t hxgep, uint16_t channel,
433 	p_tx_ring_t tx_ring_p, p_tx_mbox_t mbox_p);
434 hxge_status_t hxge_init_fzc_rxdma_channel(p_hxge_t hxgep, uint16_t channel,
435 	p_rx_rbr_ring_t rbr_p, p_rx_rcr_ring_t rcr_p, p_rx_mbox_t mbox_p);
436 hxge_status_t hxge_init_fzc_rx_common(p_hxge_t hxgep);
437 hxge_status_t hxge_init_fzc_rxdma_channel_pages(p_hxge_t hxgep,
438 	uint16_t channel, p_rx_rbr_ring_t rbr_p);
439 hxge_status_t hxge_init_fzc_txdma_channel_pages(p_hxge_t hxgep,
440 	uint16_t channel, p_tx_ring_t tx_ring_p);
441 hxge_status_t hxge_intr_mask_mgmt_set(p_hxge_t hxgep, boolean_t on);
442 
443 /* MAC functions */
444 hxge_status_t hxge_vmac_init(p_hxge_t hxgep);
445 hxge_status_t hxge_link_init(p_hxge_t hxgep);
446 hxge_status_t hxge_tx_vmac_init(p_hxge_t hxgep);
447 hxge_status_t hxge_rx_vmac_init(p_hxge_t hxgep);
448 hxge_status_t hxge_tx_vmac_enable(p_hxge_t hxgep);
449 hxge_status_t hxge_tx_vmac_disable(p_hxge_t hxgep);
450 hxge_status_t hxge_rx_vmac_enable(p_hxge_t hxgep);
451 hxge_status_t hxge_rx_vmac_disable(p_hxge_t hxgep);
452 hxge_status_t hxge_tx_vmac_reset(p_hxge_t hxgep);
453 hxge_status_t hxge_rx_vmac_reset(p_hxge_t hxgep);
454 hxge_status_t hxge_add_mcast_addr(p_hxge_t, struct ether_addr *);
455 hxge_status_t hxge_del_mcast_addr(p_hxge_t, struct ether_addr *);
456 hxge_status_t hxge_pfc_set_mac_address(p_hxge_t hxgep, uint32_t slot,
457     struct ether_addr *addrp);
458 hxge_status_t hxge_pfc_num_macs_get(p_hxge_t hxgep, uint8_t *nmacs);
459 hxge_status_t hxge_pfc_clear_mac_address(p_hxge_t, uint32_t slot);
460 hxge_status_t hxge_set_promisc(p_hxge_t hxgep, boolean_t on);
461 void hxge_save_cntrs(p_hxge_t hxgep);
462 int hxge_vmac_set_framesize(p_hxge_t hxgep);
463 
464 void hxge_debug_msg(p_hxge_t, uint64_t, char *, ...);
465 
466 #ifdef HXGE_DEBUG
467 char *hxge_dump_packet(char *addr, int size);
468 #endif
469 
470 #endif	/* !_ASM */
471 
472 #ifdef	__cplusplus
473 }
474 #endif
475 
476 #endif	/* _SYS_HXGE_HXGE_IMPL_H */
477